[brcm63xx] resync kernel configuration
[openwrt.git] / target / linux / s3c24xx / patches-2.6.24 / 1299-glamo_fb-Implement-screen-blanking.patch
1 From a2ef813d2f439a3e9f377d33a2e5baad098afb7e Mon Sep 17 00:00:00 2001
2 From: Harald Welte <laforge@openmoko.org>
3 Date: Wed, 8 Oct 2008 21:36:23 +0100
4 Subject: [PATCH] glamo_fb: Implement screen blanking
5
6 This patch implements fb_blank() for the glamo-fb driver, which switches off
7 the pixel clock (DCLK) for power saving.
8
9 We currently delay the actual pixel clock switch until we enter
10 FB_BLANK_POWERDOWN, since the backlight fade is slow and we don't want the
11 user to see artefacts on the screen while the backlight is fading out.
12
13 So since the X server first sends FB_BLANK_{V,H}SYNC_SUSPEND, we start the
14 backlight fade here, and only once we get FB_BLANK_POWERDOWN the pixel clock is
15 disabled.
16
17 There are no measurements yet, but the power savings should be double, since
18 there is no longer any generation of the high-frequency LCM signals, and
19 there are no video-related SDRAM accesses anymore.
20
21 Signed-off-by: Harald Welte <laforge@openmoko.org>
22 ---
23 drivers/mfd/glamo/glamo-core.c | 32 ++++++++++++++++++++++++++++++++
24 drivers/mfd/glamo/glamo-core.h | 6 ++++++
25 drivers/mfd/glamo/glamo-fb.c | 29 ++++++++++++++++++++++++++++-
26 3 files changed, 66 insertions(+), 1 deletions(-)
27
28 diff --git a/drivers/mfd/glamo/glamo-core.c b/drivers/mfd/glamo/glamo-core.c
29 index 2619c5f..58ee3e2 100644
30 --- a/drivers/mfd/glamo/glamo-core.c
31 +++ b/drivers/mfd/glamo/glamo-core.c
32 @@ -524,6 +524,38 @@ int glamo_engine_disable(struct glamo_core *glamo, enum glamo_engine engine)
33 }
34 EXPORT_SYMBOL_GPL(glamo_engine_disable);
35
36 +static const u_int16_t engine_clock_regs[__NUM_GLAMO_ENGINES] = {
37 + [GLAMO_ENGINE_LCD] = GLAMO_REG_CLOCK_LCD,
38 + [GLAMO_ENGINE_MMC] = GLAMO_REG_CLOCK_MMC,
39 + [GLAMO_ENGINE_ISP] = GLAMO_REG_CLOCK_ISP,
40 + [GLAMO_ENGINE_JPEG] = GLAMO_REG_CLOCK_JPEG,
41 + [GLAMO_ENGINE_3D] = GLAMO_REG_CLOCK_3D,
42 + [GLAMO_ENGINE_2D] = GLAMO_REG_CLOCK_2D,
43 + [GLAMO_ENGINE_MPEG_ENC] = GLAMO_REG_CLOCK_MPEG,
44 + [GLAMO_ENGINE_MPEG_DEC] = GLAMO_REG_CLOCK_MPEG,
45 +};
46 +
47 +void glamo_engine_clkreg_set(struct glamo_core *glamo,
48 + enum glamo_engine engine,
49 + u_int16_t mask, u_int16_t val)
50 +{
51 + reg_set_bit_mask(glamo, engine_clock_regs[engine], mask, val);
52 +}
53 +EXPORT_SYMBOL_GPL(glamo_engine_clkreg_set);
54 +
55 +u_int16_t glamo_engine_clkreg_get(struct glamo_core *glamo,
56 + enum glamo_engine engine)
57 +{
58 + u_int16_t val;
59 +
60 + spin_lock(&glamo->lock);
61 + val = __reg_read(glamo, engine_clock_regs[engine]);
62 + spin_unlock(&glamo->lock);
63 +
64 + return val;
65 +}
66 +EXPORT_SYMBOL_GPL(glamo_engine_clkreg_get);
67 +
68 struct glamo_script reset_regs[] = {
69 [GLAMO_ENGINE_LCD] = {
70 GLAMO_REG_CLOCK_LCD, GLAMO_CLOCK_LCD_RESET
71 diff --git a/drivers/mfd/glamo/glamo-core.h b/drivers/mfd/glamo/glamo-core.h
72 index ac5eacf..fb5f0f6 100644
73 --- a/drivers/mfd/glamo/glamo-core.h
74 +++ b/drivers/mfd/glamo/glamo-core.h
75 @@ -98,4 +98,10 @@ void glamo_engine_reset(struct glamo_core *glamo, enum glamo_engine engine);
76 int glamo_engine_reclock(struct glamo_core *glamo,
77 enum glamo_engine engine, int ps);
78
79 +void glamo_engine_clkreg_set(struct glamo_core *glamo,
80 + enum glamo_engine engine,
81 + u_int16_t mask, u_int16_t val);
82 +
83 +u_int16_t glamo_engine_clkreg_get(struct glamo_core *glamo,
84 + enum glamo_engine engine);
85 #endif /* __GLAMO_CORE_H */
86 diff --git a/drivers/mfd/glamo/glamo-fb.c b/drivers/mfd/glamo/glamo-fb.c
87 index 8f5d6b1..5cd6e05 100644
88 --- a/drivers/mfd/glamo/glamo-fb.c
89 +++ b/drivers/mfd/glamo/glamo-fb.c
90 @@ -420,7 +420,34 @@ static int glamofb_set_par(struct fb_info *info)
91
92 static int glamofb_blank(int blank_mode, struct fb_info *info)
93 {
94 - /* FIXME */
95 + struct glamofb_handle *gfb = info->par;
96 + struct glamo_core *gcore = gfb->mach_info->glamo;
97 +
98 + dev_dbg(gfb->dev, "glamofb_blank(%u)\n", blank_mode);
99 +
100 + switch (blank_mode) {
101 + case FB_BLANK_VSYNC_SUSPEND:
102 + case FB_BLANK_HSYNC_SUSPEND:
103 + /* FIXME: add pdata hook/flag to indicate whether
104 + * we should already switch off pixel clock here */
105 + break;
106 + case FB_BLANK_POWERDOWN:
107 + /* disable the pixel clock */
108 + glamo_engine_clkreg_set(gcore, GLAMO_ENGINE_LCD,
109 + GLAMO_CLOCK_LCD_EN_DCLK, 0);
110 + break;
111 + case FB_BLANK_UNBLANK:
112 + case FB_BLANK_NORMAL:
113 + /* enable the pixel clock */
114 + glamo_engine_clkreg_set(gcore, GLAMO_ENGINE_LCD,
115 + GLAMO_CLOCK_LCD_EN_DCLK,
116 + GLAMO_CLOCK_LCD_EN_DCLK);
117 + break;
118 + }
119 +
120 + /* FIXME: once we have proper clock management in glamo-core,
121 + * we can determine if other units need MCLK1 or the PLL, and
122 + * disable it if not used. */
123 return 0;
124 }
125
126 --
127 1.5.6.5
128
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