ar71xx: change the linking order of the ag71xx module so that the driver can take...
[openwrt.git] / target / linux / brcm63xx / patches-2.6.30 / 007-usb_ohci_support.patch
1 From f7416412febd7efc1d33c7506c81265719368667 Mon Sep 17 00:00:00 2001
2 From: Maxime Bizon <mbizon@freebox.fr>
3 Date: Mon, 21 Jul 2008 14:58:19 +0200
4 Subject: [PATCH] [MIPS] BCM63XX: Add USB OHCI support.
5
6 Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
7 ---
8 arch/mips/bcm63xx/Kconfig | 6 +
9 arch/mips/bcm63xx/Makefile | 1 +
10 arch/mips/bcm63xx/dev-usb-ohci.c | 50 ++++++
11 drivers/usb/host/ohci-bcm63xx.c | 159 ++++++++++++++++++++
12 drivers/usb/host/ohci-hcd.c | 5 +
13 drivers/usb/host/ohci.h | 7 +-
14 .../asm-mips/mach-bcm63xx/bcm63xx_dev_usb_ohci.h | 6 +
15 7 files changed, 233 insertions(+), 1 deletions(-)
16 create mode 100644 arch/mips/bcm63xx/dev-usb-ohci.c
17 create mode 100644 drivers/usb/host/ohci-bcm63xx.c
18 create mode 100644 include/asm-mips/mach-bcm63xx/bcm63xx_dev_usb_ohci.h
19
20 --- a/drivers/usb/host/ohci-hcd.c
21 +++ b/drivers/usb/host/ohci-hcd.c
22 @@ -1047,6 +1047,11 @@ MODULE_LICENSE ("GPL");
23 #define PLATFORM_DRIVER usb_hcd_pnx4008_driver
24 #endif
25
26 +#ifdef CONFIG_BCM63XX
27 +#include "ohci-bcm63xx.c"
28 +#define PLATFORM_DRIVER ohci_hcd_bcm63xx_driver
29 +#endif
30 +
31 #if defined(CONFIG_CPU_SUBTYPE_SH7720) || \
32 defined(CONFIG_CPU_SUBTYPE_SH7721) || \
33 defined(CONFIG_CPU_SUBTYPE_SH7763) || \
34 --- a/drivers/usb/host/ohci.h
35 +++ b/drivers/usb/host/ohci.h
36 @@ -536,6 +536,11 @@ static inline struct usb_hcd *ohci_to_hc
37 #define big_endian_mmio(ohci) 0 /* only little endian */
38 #endif
39
40 +#if defined(CONFIG_MIPS) && defined(CONFIG_BCM63XX)
41 +#define readl_be(addr) __raw_readl((__force unsigned *)addr)
42 +#define writel_be(val, addr) __raw_writel(val, (__force unsigned *)addr)
43 +#endif
44 +
45 /*
46 * Big-endian read/write functions are arch-specific.
47 * Other arches can be added if/when they're needed.
48 @@ -646,7 +651,7 @@ static inline u32 hc32_to_cpup (const st
49 * some big-endian SOC implementations. Same thing happens with PSW access.
50 */
51
52 -#ifdef CONFIG_PPC_MPC52xx
53 +#if defined(CONFIG_PPC_MPC52xx) || defined(CONFIG_BCM63XX)
54 #define big_endian_frame_no_quirk(ohci) (ohci->flags & OHCI_QUIRK_FRAME_NO)
55 #else
56 #define big_endian_frame_no_quirk(ohci) 0
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