/*
- * OHCI HCD (Host Controller Driver) for USB.
+ * ADM5120 HCD (Host Controller Driver) for USB
*
- * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
- * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
+ * Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * This file was derived from: drivers/usb/host/ohci-hub.c
+ * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
+ * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
*
- * This file is licenced under GPL
*/
/*-------------------------------------------------------------------------*/
/*
- * OHCI Root Hub ... the nonsharable stuff
+ * ADM5120 Root Hub ... the nonsharable stuff
*/
#define dbg_port(hc,label,num,value) \
/*-------------------------------------------------------------------------*/
-/* hcd->hub_irq_enable() */
-static void admhc_hub_irq_enable(struct usb_hcd *hcd)
-{
- struct admhcd *ahcd = hcd_to_admhcd(hcd);
-
- spin_lock_irq(&ahcd->lock);
- if (!ahcd->autostop)
- del_timer(&hcd->rh_timer); /* Prevent next poll */
- admhc_intr_enable(ahcd, ADMHC_INTR_INSM);
- spin_unlock_irq(&ahcd->lock);
-}
-
-/*-------------------------------------------------------------------------*/
-
/* build "status change" packet (one or two bytes) from HC registers */
static int
static inline int admhc_port_reset(struct admhcd *ahcd, unsigned port)
{
u32 t;
- int c;
admhc_vdbg(ahcd, "reset port%d\n", port);
-
t = admhc_read_portstatus(ahcd, port);
if (!(t & ADMHC_PS_CCS))
return -ENODEV;
- if ((t & ADMHC_PS_PRS))
- return 0;
-
- admhc_write_portstatus(ahcd, port, ADMHC_PS_PRS);
- c = 0;
- do {
- t = admhc_read_portstatus(ahcd, port);
- if (t & ADMHC_PS_PRSC)
- break;
-
- if (++c > 20) {
- admhc_err(ahcd, "port%d reset timed out\n",port);
- return -EPIPE;
- }
-
- mdelay(PORT_RESET_HW_MSEC);
- } while (1);
- admhc_vdbg(ahcd, "port%d reset completed within %dms\n", port,
- c * PORT_RESET_HW_MSEC);
-
- t = admhc_read_portstatus(ahcd, port);
- if (!(t & ADMHC_PS_CCS)) {
- admhc_err(ahcd, "port%d is not connected after reset\n",port);
- return -ENODEV;
- }
-
- admhc_write_portstatus(ahcd, port, ADMHC_PS_SPE);
- c = 0;
- do {
- t = admhc_read_portstatus(ahcd, port);
- if (t & ADMHC_PS_PESC)
- break;
-
- if (++c > 20) {
- admhc_err(ahcd, "port%d enable timed out\n",port);
- return -EPIPE;
- }
-
- mdelay(PORT_RESET_HW_MSEC);
- } while (1);
- admhc_vdbg(ahcd, "port%d enable completed within %dms\n", port,
- c * PORT_RESET_HW_MSEC);
-
- admhc_write_portstatus(ahcd, port, ADMHC_PS_CSC);
+ admhc_write_portstatus(ahcd, port, ADMHC_PS_SPR);
+ mdelay(10);
+ admhc_write_portstatus(ahcd, port, (ADMHC_PS_SPE | ADMHC_PS_CSC));
+ mdelay(100);
return 0;
}
if (!(t & ADMHC_PS_CCS))
return -ENODEV;
- admhc_write_portstatus(ahcd, ADMHC_PS_CPE, port);
+ admhc_write_portstatus(ahcd, port, ADMHC_PS_CPE);
return 0;
}
static inline int admhc_port_write(struct admhcd *ahcd, unsigned port,
u32 val)
{
+#ifdef ADMHC_VERBOSE_DEBUG
dbg_port_write(ahcd, "write", port, val);
+#endif
admhc_write_portstatus(ahcd, port, val);
return 0;