[package] mac80211: update ath9k patches
[openwrt.git] / target / linux / ixp4xx / patches-2.6.26 / 105-wg302v1_support.patch
index 1023423..1951ff9 100644 (file)
@@ -1,6 +1,6 @@
 --- a/arch/arm/configs/ixp4xx_defconfig
 +++ b/arch/arm/configs/ixp4xx_defconfig
-@@ -155,6 +155,7 @@
+@@ -155,6 +155,7 @@ CONFIG_MACH_AVILA=y
  CONFIG_MACH_LOFT=y
  CONFIG_ARCH_ADI_COYOTE=y
  CONFIG_MACH_GATEWAY7001=y
@@ -10,7 +10,7 @@
  CONFIG_MACH_IXDPG425=y
 --- a/arch/arm/mach-ixp4xx/Kconfig
 +++ b/arch/arm/mach-ixp4xx/Kconfig
-@@ -49,6 +49,14 @@
+@@ -49,6 +49,14 @@ config MACH_GATEWAY7001
          7001 Access Point. For more information on this platform,
          see http://openwrt.org
  
@@ -27,7 +27,7 @@
        select PCI
 --- a/arch/arm/mach-ixp4xx/Makefile
 +++ b/arch/arm/mach-ixp4xx/Makefile
-@@ -14,6 +14,7 @@
+@@ -14,6 +14,7 @@ obj-pci-$(CONFIG_MACH_NSLU2)         += nslu2-p
  obj-pci-$(CONFIG_MACH_NAS100D)                += nas100d-pci.o
  obj-pci-$(CONFIG_MACH_DSMG600)                += dsmg600-pci.o
  obj-pci-$(CONFIG_MACH_GATEWAY7001)    += gateway7001-pci.o
@@ -35,7 +35,7 @@
  obj-pci-$(CONFIG_MACH_WG302V2)                += wg302v2-pci.o
  obj-pci-$(CONFIG_MACH_FSG)            += fsg-pci.o
  
-@@ -28,6 +29,7 @@
+@@ -28,6 +29,7 @@ obj-$(CONFIG_MACH_NSLU2)     += nslu2-setup.
  obj-$(CONFIG_MACH_NAS100D)    += nas100d-setup.o
  obj-$(CONFIG_MACH_DSMG600)      += dsmg600-setup.o
  obj-$(CONFIG_MACH_GATEWAY7001)        += gateway7001-setup.o
 +subsys_initcall(wg302v1_pci_init);
 --- /dev/null
 +++ b/arch/arm/mach-ixp4xx/wg302v1-setup.c
-@@ -0,0 +1,126 @@
+@@ -0,0 +1,142 @@
 +/*
 + * arch/arm/mach-ixp4xx/wg302v1-setup.c
 + *
 +      .resource       = &wg302v1_flash_resource,
 +};
 +
-+static struct resource wg302v1_uart_resource = {
-+      .start  = IXP4XX_UART1_BASE_PHYS,
-+      .end    = IXP4XX_UART1_BASE_PHYS + 0x0fff,
-+      .flags  = IORESOURCE_MEM,
++static struct resource wg302v1_uart_resources[] = {
++      {
++              .start  = IXP4XX_UART1_BASE_PHYS,
++              .end    = IXP4XX_UART1_BASE_PHYS + 0x0fff,
++              .flags  = IORESOURCE_MEM,
++      },
++      {
++              .start  = IXP4XX_UART2_BASE_PHYS,
++              .end    = IXP4XX_UART2_BASE_PHYS + 0x0fff,
++              .flags  = IORESOURCE_MEM,
++      }
 +};
 +
 +static struct plat_serial8250_port wg302v1_uart_data[] = {
 +              .regshift       = 2,
 +              .uartclk        = IXP4XX_UART_XTAL,
 +      },
++      {
++              .mapbase        = IXP4XX_UART2_BASE_PHYS,
++              .membase        = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
++              .irq            = IRQ_IXP4XX_UART2,
++              .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
++              .iotype         = UPIO_MEM,
++              .regshift       = 2,
++              .uartclk        = IXP4XX_UART_XTAL,
++      },
 +      { },
 +};
 +
 +      .dev                    = {
 +              .platform_data  = wg302v1_uart_data,
 +      },
-+      .num_resources  = 1,
-+      .resource       = &wg302v1_uart_resource,
++      .num_resources  = 2,
++      .resource       = wg302v1_uart_resources,
 +};
 +
 +static struct eth_plat_info wg302v1_plat_eth[] = {
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