ar71xx: override fifo_cfg[123] values on AR7240

[openwrt.git] / target / linux / ar71xx / files / drivers / net / ag71xx / ag71xx.h

diff --git a/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h b/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h
index 2bbc748..77962fe 100644 (file)
--- a/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h
+++ b/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h
@@ -1,7 +1,7 @@
 /*
  *  Atheros AR71xx built-in ethernet mac driver
  *
- *  Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
  *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
  *
  *  Based on Atheros' AG7100 driver
@@ -38,7 +38,7 @@
 #define ETH_FCS_LEN    4
 
 #define AG71XX_DRV_NAME                "ag71xx"
-#define AG71XX_DRV_VERSION     "0.5.17"
+#define AG71XX_DRV_VERSION     "0.5.25"
 
 #define AG71XX_NAPI_WEIGHT     64
 #define AG71XX_OOM_REFILL      (1 + HZ/10)
@@ -63,8 +63,7 @@
 
 #define AG71XX_RX_RING_SIZE    128
 
-#undef AG71XX_DEBUG
-#ifdef AG71XX_DEBUG
+#ifdef CONFIG_AG71XX_DEBUG
 #define DBG(fmt, args...)      printk(KERN_DEBUG fmt, ## args)
 #else
 #define DBG(fmt, args...)      do {} while (0)
@@ -83,33 +82,35 @@ struct ag71xx_desc {
        u32     ctrl;
 #define DESC_EMPTY     BIT(31)
 #define DESC_MORE      BIT(24)
-#define DESC_PKTLEN_M  0x1fff
+#define DESC_PKTLEN_M  0xfff
        u32     next;
        u32     pad;
-};
+} __attribute__((aligned(4)));
 
 struct ag71xx_buf {
        struct sk_buff  *skb;
+       struct ag71xx_desc *desc;
 };
 
 struct ag71xx_ring {
        struct ag71xx_buf       *buf;
-       struct ag71xx_desc      *descs;
+       u8                      *descs_cpu;
        dma_addr_t              descs_dma;
+       unsigned int            desc_size;
        unsigned int            curr;
        unsigned int            dirty;
        unsigned int            size;
 };
 
 struct ag71xx_mdio {
-       struct mii_bus  mii_bus;
-       int             mii_irq[PHY_MAX_ADDR];
-       void __iomem    *mdio_base;
+       struct mii_bus          *mii_bus;
+       int                     mii_irq[PHY_MAX_ADDR];
+       void __iomem            *mdio_base;
+       struct ag71xx_mdio_platform_data *pdata;
 };
 
 struct ag71xx {
        void __iomem            *mac_base;
-       void __iomem            *mac_base2;
        void __iomem            *mii_ctrl;
 
        spinlock_t              lock;
@@ -135,13 +136,13 @@ struct ag71xx {
 extern struct ethtool_ops ag71xx_ethtool_ops;
 
 extern struct ag71xx_mdio *ag71xx_mdio_bus;
-extern int ag71xx_mdio_driver_init(void) __init;
-extern void ag71xx_mdio_driver_exit(void);
+int ag71xx_mdio_driver_init(void) __init;
+void ag71xx_mdio_driver_exit(void);
 
-extern int ag71xx_phy_connect(struct ag71xx *ag);
-extern void ag71xx_phy_disconnect(struct ag71xx *ag);
-extern void ag71xx_phy_start(struct ag71xx *ag);
-extern void ag71xx_phy_stop(struct ag71xx *ag);
+int ag71xx_phy_connect(struct ag71xx *ag);
+void ag71xx_phy_disconnect(struct ag71xx *ag);
+void ag71xx_phy_start(struct ag71xx *ag);
+void ag71xx_phy_stop(struct ag71xx *ag);
 
 static inline struct ag71xx_platform_data *ag71xx_get_pdata(struct ag71xx *ag)
 {
@@ -313,14 +314,12 @@ static inline void ag71xx_wr(struct ag71xx *ag, unsigned reg, u32 value)
 
        switch (reg) {
        case AG71XX_REG_MAC_CFG1 ... AG71XX_REG_MAC_MFL:
-               r = ag->mac_base + reg;
-               __raw_writel(value, r);
-               __raw_readl(r);
-               break;
        case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_INT_STATUS:
-               r = ag->mac_base2 + reg - AG71XX_REG_MAC_IFCTL;
+               r = ag->mac_base + reg;
                __raw_writel(value, r);
-               __raw_readl(r);
+
+               /* flush write */
+               (void) __raw_readl(r);
                break;
        default:
                BUG();
@@ -334,11 +333,8 @@ static inline u32 ag71xx_rr(struct ag71xx *ag, unsigned reg)
 
        switch (reg) {
        case AG71XX_REG_MAC_CFG1 ... AG71XX_REG_MAC_MFL:
-               r = ag->mac_base + reg;
-               ret = __raw_readl(r);
-               break;
        case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_INT_STATUS:
-               r = ag->mac_base2 + reg - AG71XX_REG_MAC_IFCTL;
+               r = ag->mac_base + reg;
                ret = __raw_readl(r);
                break;
        default:
@@ -354,14 +350,12 @@ static inline void ag71xx_sb(struct ag71xx *ag, unsigned reg, u32 mask)
 
        switch (reg) {
        case AG71XX_REG_MAC_CFG1 ... AG71XX_REG_MAC_MFL:
-               r = ag->mac_base + reg;
-               __raw_writel(__raw_readl(r) | mask, r);
-               __raw_readl(r);
-               break;
        case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_INT_STATUS:
-               r = ag->mac_base2 + reg - AG71XX_REG_MAC_IFCTL;
+               r = ag->mac_base + reg;
                __raw_writel(__raw_readl(r) | mask, r);
-               __raw_readl(r);
+
+               /* flush write */
+               (void)__raw_readl(r);
                break;
        default:
                BUG();
@@ -374,14 +368,12 @@ static inline void ag71xx_cb(struct ag71xx *ag, unsigned reg, u32 mask)
 
        switch (reg) {
        case AG71XX_REG_MAC_CFG1 ... AG71XX_REG_MAC_MFL:
-               r = ag->mac_base + reg;
-               __raw_writel(__raw_readl(r) & ~mask, r);
-               __raw_readl(r);
-               break;
        case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_INT_STATUS:
-               r = ag->mac_base2 + reg - AG71XX_REG_MAC_IFCTL;
+               r = ag->mac_base + reg;
                __raw_writel(__raw_readl(r) & ~mask, r);
-               __raw_readl(r);
+
+               /* flush write */
+               (void) __raw_readl(r);
                break;
        default:
                BUG();
@@ -400,12 +392,24 @@ static inline void ag71xx_int_disable(struct ag71xx *ag, u32 ints)
 
 static inline void ag71xx_mii_ctrl_wr(struct ag71xx *ag, u32 value)
 {
+       struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
+
+       if (pdata->is_ar724x)
+               return;
+
        __raw_writel(value, ag->mii_ctrl);
+
+       /* flush write */
        __raw_readl(ag->mii_ctrl);
 }
 
 static inline u32 ag71xx_mii_ctrl_rr(struct ag71xx *ag)
 {
+       struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
+
+       if (pdata->is_ar724x)
+               return 0xffffffff;
+
        return __raw_readl(ag->mii_ctrl);
 }
 
@@ -431,4 +435,20 @@ static void inline ag71xx_mii_ctrl_set_speed(struct ag71xx *ag,
        ag71xx_mii_ctrl_wr(ag, t);
 }
 
+#ifdef CONFIG_AG71XX_AR8216_SUPPORT
+void ag71xx_add_ar8216_header(struct ag71xx *ag, struct sk_buff *skb);
+int ag71xx_remove_ar8216_header(struct ag71xx *ag, struct sk_buff *skb);
+#else
+static inline void ag71xx_add_ar8216_header(struct ag71xx *ag,
+                                          struct sk_buff *skb)
+{
+}
+
+static inline int ag71xx_remove_ar8216_header(struct ag71xx *ag,
+                                             struct sk_buff *skb)
+{
+       return 0;
+}
+#endif
+
 #endif /* _AG71XX_H */