add new switch configuration api

[openwrt.git] / target / linux / brcm47xx / patches-2.6.23 / 220-bcm5354.patch

diff --git a/target/linux/brcm47xx/patches-2.6.23/220-bcm5354.patch b/target/linux/brcm47xx/patches-2.6.23/220-bcm5354.patch
index e033338..732178c 100644 (file)
--- a/target/linux/brcm47xx/patches-2.6.23/220-bcm5354.patch
+++ b/target/linux/brcm47xx/patches-2.6.23/220-bcm5354.patch
@@ -1,8 +1,6 @@
-Index: linux-2.6.23.17/drivers/ssb/driver_chipcommon.c
-===================================================================
---- linux-2.6.23.17.orig/drivers/ssb/driver_chipcommon.c
-+++ linux-2.6.23.17/drivers/ssb/driver_chipcommon.c
-@@ -270,6 +270,8 @@ void ssb_chipco_resume(struct ssb_chipco
+--- a/drivers/ssb/driver_chipcommon.c
++++ b/drivers/ssb/driver_chipcommon.c
+@@ -270,6 +270,8 @@

  void ssb_chipco_get_clockcpu(struct ssb_chipcommon *cc,
                               u32 *plltype, u32 *n, u32 *m)
  {
  void ssb_chipco_get_clockcpu(struct ssb_chipcommon *cc,
                               u32 *plltype, u32 *n, u32 *m)
  {


@@ -11,7 +9,7 @@ Index: linux-2.6.23.17/drivers/ssb/driver_chipcommon.c
        *n = chipco_read32(cc, SSB_CHIPCO_CLOCK_N);
        *plltype = (cc->capabilities & SSB_CHIPCO_CAP_PLLT);
        switch (*plltype) {
        *n = chipco_read32(cc, SSB_CHIPCO_CLOCK_N);
        *plltype = (cc->capabilities & SSB_CHIPCO_CAP_PLLT);
        switch (*plltype) {

-@@ -293,6 +295,8 @@ void ssb_chipco_get_clockcpu(struct ssb_
+@@ -293,6 +295,8 @@

  void ssb_chipco_get_clockcontrol(struct ssb_chipcommon *cc,
                                 u32 *plltype, u32 *n, u32 *m)
  {
  void ssb_chipco_get_clockcontrol(struct ssb_chipcommon *cc,
                                 u32 *plltype, u32 *n, u32 *m)
  {


@@ -20,11 +18,9 @@ Index: linux-2.6.23.17/drivers/ssb/driver_chipcommon.c
        *n = chipco_read32(cc, SSB_CHIPCO_CLOCK_N);
        *plltype = (cc->capabilities & SSB_CHIPCO_CAP_PLLT);
        switch (*plltype) {
        *n = chipco_read32(cc, SSB_CHIPCO_CLOCK_N);
        *plltype = (cc->capabilities & SSB_CHIPCO_CAP_PLLT);
        switch (*plltype) {

-Index: linux-2.6.23.17/drivers/ssb/driver_mipscore.c
-===================================================================
---- linux-2.6.23.17.orig/drivers/ssb/driver_mipscore.c
-+++ linux-2.6.23.17/drivers/ssb/driver_mipscore.c
-@@ -161,6 +161,8 @@ u32 ssb_cpu_clock(struct ssb_mipscore *m
+--- a/drivers/ssb/driver_mipscore.c
++++ b/drivers/ssb/driver_mipscore.c
+@@ -161,6 +161,8 @@

  
        if ((pll_type == SSB_PLLTYPE_5) || (bus->chip_id == 0x5365)) {
                rate = 200000000;
  
        if ((pll_type == SSB_PLLTYPE_5) || (bus->chip_id == 0x5365)) {
                rate = 200000000;


@@ -33,11 +29,9 @@ Index: linux-2.6.23.17/drivers/ssb/driver_mipscore.c
        } else {
                rate = ssb_calc_clock_rate(pll_type, n, m);
        }
        } else {
                rate = ssb_calc_clock_rate(pll_type, n, m);
        }

-Index: linux-2.6.23.17/drivers/ssb/main.c
-===================================================================
---- linux-2.6.23.17.orig/drivers/ssb/main.c
-+++ linux-2.6.23.17/drivers/ssb/main.c
-@@ -862,6 +862,8 @@ u32 ssb_clockspeed(struct ssb_bus *bus)
+--- a/drivers/ssb/main.c
++++ b/drivers/ssb/main.c
+@@ -862,6 +862,8 @@

  
        if (bus->chip_id == 0x5365) {
                rate = 100000000;
  
        if (bus->chip_id == 0x5365) {
                rate = 100000000;