writel(val, rt2880_pci_base + reg);
}
+static inline u32 rt2880_pci_get_cfgaddr(unsigned int bus, unsigned int slot,
+ unsigned int func, unsigned int where)
+{
+ return ((bus << 16) | (slot << 11) | (func << 8) | (where & 0xfc) |
+ 0x80000000);
+}
+
static void config_access(unsigned char access_type, struct pci_bus *bus,
unsigned int devfn, unsigned char where, u32 *data)
{
- unsigned int slot = PCI_SLOT(devfn);
unsigned int address;
- u8 func = PCI_FUNC(devfn);
- address = (bus->number << 16) | (slot << 11) | (func << 8) |
- (where & 0xfc) | 0x80000000;
+ address = rt2880_pci_get_cfgaddr(bus->number, PCI_SLOT(devfn),
+ PCI_FUNC(devfn), where);
rt2880_pci_reg_write(address, RT2880_PCI_REG_CONFIG_ADDR);
if (access_type == PCI_ACCESS_WRITE)
config_access(PCI_ACCESS_READ, bus, devfn, where, &data);
spin_unlock_irqrestore(&rt2880_pci_lock, flags);
- if (size == 1)
+ switch (size) {
+ case 1:
*val = (data >> ((where & 3) << 3)) & 0xff;
- else if (size == 2)
+ break;
+ case 2:
*val = (data >> ((where & 3) << 3)) & 0xffff;
- else
+ break;
+ case 4:
*val = data;
+ break;
+ }
return PCIBIOS_SUCCESSFUL;
}
u32 data = 0;
spin_lock_irqsave(&rt2880_pci_lock, flags);
- if (size == 4) {
- data = val;
- } else {
+
+ switch (size) {
+ case 1:
+ config_access(PCI_ACCESS_READ, bus, devfn, where, &data);
+ data = (data & ~(0xff << ((where & 3) << 3))) |
+ (val << ((where & 3) << 3));
+ break;
+ case 2:
config_access(PCI_ACCESS_READ, bus, devfn, where, &data);
- if (size == 1)
- data = (data & ~(0xff << ((where & 3) << 3))) |
- (val << ((where & 3) << 3));
- else if (size == 2)
- data = (data & ~(0xffff << ((where & 3) << 3))) |
- (val << ((where & 3) << 3));
+ data = (data & ~(0xffff << ((where & 3) << 3))) |
+ (val << ((where & 3) << 3));
+ break;
+ case 4:
+ data = val;
+ break;
}
config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data);
unsigned long address;
unsigned long flags;
- address = (bus << 16) | (dev << 11) | (func << 8) | (reg & 0xfc) |
- 0x80000000;
+ address = rt2880_pci_get_cfgaddr(bus, dev, func, reg);
spin_lock_irqsave(&rt2880_pci_lock, flags);
rt2880_pci_reg_write(address, RT2880_PCI_REG_CONFIG_ADDR);
unsigned long address;
unsigned long flags;
- address = (bus << 16) | (dev << 11) | (func << 8) | (reg & 0xfc) |
- 0x80000000;
+ address = rt2880_pci_get_cfgaddr(bus, dev, func, reg);
spin_lock_irqsave(&rt2880_pci_lock, flags);
rt2880_pci_reg_write(address, RT2880_PCI_REG_CONFIG_ADDR);