+}
--- /dev/null
+++ b/drivers/usb/dwc_otg/dwc_otg_driver.c
-@@ -0,0 +1,1264 @@
+@@ -0,0 +1,1269 @@
+/* ==========================================================================
+ * $File: //dwh/usb_iip/dev/software/otg_ipmate/linux/drivers/dwc_otg_driver.c $
+ * $Revision: 1.1.1.1 $
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/init.h>
++#include <linux/gpio.h>
+
+#include <linux/device.h>
+#include <linux/platform_device.h>
+ struct resource *res;
+ gusbcfg_data_t usbcfg = {.d32 = 0};
+
++ // GPIOs
++ gpio_request(_dev->dev.platform_data, "USB_POWER");
++ gpio_direction_output(_dev->dev.platform_data, 1);
++
+ dev_dbg(&_dev->dev, "dwc_otg_driver_probe (%p)\n", _dev);
+
+ dwc_otg_device = kmalloc(sizeof(dwc_otg_device_t), GFP_KERNEL);
+#endif /* DWC_DEVICE_ONLY */
--- /dev/null
+++ b/drivers/usb/dwc_otg/dwc_otg_ifx.c
-@@ -0,0 +1,176 @@
+@@ -0,0 +1,105 @@
+/******************************************************************************
+**
+** FILE NAME : dwc_otg_ifx.c
+#define readl lq_r32
+void dwc_otg_power_on (void)
+{
-+ // GPIOs
-+ gpio_request(28, "USB_POWER");
-+ gpio_direction_output(28, 1);
-+ /*
-+ writel(readl(IFXMIPS_GPIO_P0_DIR) | (0x4000), IFXMIPS_GPIO_P0_DIR);
-+ writel(readl(IFXMIPS_GPIO_P0_OD) | (0x4000), IFXMIPS_GPIO_P0_OD);
-+ writel(readl(IFXMIPS_GPIO_P0_ALTSEL0) & ~(0x4000), IFXMIPS_GPIO_P0_ALTSEL0);
-+ writel(readl(IFXMIPS_GPIO_P0_ALTSEL1) & ~(0x4000), IFXMIPS_GPIO_P0_ALTSEL1);
-+ writel(readl(IFXMIPS_GPIO_P0_OUT) | (0x4000), IFXMIPS_GPIO_P0_OUT);
-+*/
-+/* writel(readl(IFXMIPS_GPIO_P1_DIR) | (0x1000), IFXMIPS_GPIO_P1_DIR);
-+ writel(readl(IFXMIPS_GPIO_P1_OD) | (0x1000), IFXMIPS_GPIO_P1_OD);
-+ writel(readl(IFXMIPS_GPIO_P1_ALTSEL0) & ~(0x1000), IFXMIPS_GPIO_P1_ALTSEL0);
-+ writel(readl(IFXMIPS_GPIO_P1_ALTSEL1) & ~(0x1000), IFXMIPS_GPIO_P1_ALTSEL1);
-+ writel(readl(IFXMIPS_GPIO_P1_OUT) | (0x1000), IFXMIPS_GPIO_P1_OUT);
-+*/
+ // clear power
-+ //set_bit (0, DANUBE_PMU_PWDCR);
-+ //set_bit (6, DANUBE_PMU_PWDCR);
+ writel(readl(DANUBE_PMU_PWDCR) | 0x41, DANUBE_PMU_PWDCR);
-+
+ // set clock gating
-+ //set_bit (4, (volatile unsigned long *)DANUBE_CGU_IFCCR);
-+ //set_bit (5, (volatile unsigned long *)DANUBE_CGU_IFCCR);
+ writel(readl(DANUBE_CGU_IFCCR) | 0x30, DANUBE_CGU_IFCCR);
-+
+ // set power
-+ //clear_bit (0, (volatile unsigned long *)DANUBE_PMU_PWDCR);
+ writel(readl(DANUBE_PMU_PWDCR) & ~0x1, DANUBE_PMU_PWDCR);
-+ //clear_bit (6, (volatile unsigned long *)DANUBE_PMU_PWDCR);
+ writel(readl(DANUBE_PMU_PWDCR) & ~0x40, DANUBE_PMU_PWDCR);
-+ //clear_bit (15, (volatile unsigned long *)DANUBE_PMU_PWDCR);
+ writel(readl(DANUBE_PMU_PWDCR) & ~0x8000, DANUBE_PMU_PWDCR);
-+ //writel(readl(DANUBE_PMU_PWDCR) & ~0x8041, DANUBE_PMU_PWDCR);
+
+#if 1//defined (DWC_HOST_ONLY)
+ // make the hardware be a host controller (default)
+
+static void release_platform_dev(struct device * dev)
+{
-+ printk("IFX dwc_otg USB platform_dev release\n");
-+ dev->parent = NULL;
+}
+
-+static struct resource resources[] =
-+{
-+ [0] = {
-+ .name = "dwc_otg_membase",
-+ .start = IFX_USB_IOMEM_BASE,
-+ .end = IFX_USB_IOMEM_BASE + IFX_USB_IOMEM_SIZE - 1,
-+ .flags = IORESOURCE_MEM,
-+ },
-+ [1] = {
-+ .name = "dwc_otg_irq",
-+ .start = IFX_USB_IRQ,
-+ .flags = IORESOURCE_IRQ,
-+ },
-+};
-+
-+static u64 dwc_dmamask = (u32)0x1fffffff;
-+
-+static struct platform_device platform_dev = {
-+ .dev = {
-+ .release = release_platform_dev,
-+ .dma_mask = &dwc_dmamask,
-+ },
-+ .resource = resources,
-+ .num_resources = ARRAY_SIZE(resources),
-+};
-+
-+extern const char dwc_driver_name[];
+int ifx_usb_hc_init(unsigned long base_addr, int irq)
+{
-+ if (platform_dev.dev.parent)
-+ return -EBUSY;
-+
-+ /* finish seting up the platform device */
-+ //resources[0].start = base_addr;
-+ //resources[0].end = base_addr + SZ_256K;
-+
-+ //resources[1].start = irq;
-+
-+ /* The driver core will probe for us. We know sl811-hcd has been
-+ * initialized already because of the link order dependency.
-+ */
-+ platform_dev.name = dwc_driver_name;
-+ lq_enable_irq(resources[1].start);
-+
-+ return platform_device_register(&platform_dev);
++ return 0;
+}
+
+void ifx_usb_hc_remove(void)
+{
-+ platform_device_unregister(&platform_dev);
+}
--- /dev/null
+++ b/drivers/usb/dwc_otg/dwc_otg_ifx.h
obj-$(CONFIG_LANTIQ_MACH_EASY50712) += mach-easy50712.o
obj-$(CONFIG_LANTIQ_MACH_EASY4010) += mach-easy4010.o
obj-$(CONFIG_LANTIQ_MACH_ARV45XX) += mach-arv45xx.o
-+onj-y += dev-dwc_otg.o
++obj-y += dev-dwc_otg.o
--- /dev/null
+++ b/arch/mips/lantiq/xway/dev-dwc_otg.c
-@@ -0,0 +1,64 @@
+@@ -0,0 +1,68 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+#include <xway_irq.h>
+#include <lantiq_platform.h>
+
++#define LQ_USB_IOMEM_BASE 0x1e101000
++#define LQ_USB_IOMEM_SIZE 0x00040000
++
+static struct resource resources[] =
+{
+ [0] = {
+ .name = "dwc_otg_membase",
-+ .start = IFX_USB_IOMEM_BASE,
-+ .end = IFX_USB_IOMEM_BASE + IFX_USB_IOMEM_SIZE - 1,
++ .start = LQ_USB_IOMEM_BASE,
++ .end = LQ_USB_IOMEM_BASE + LQ_USB_IOMEM_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .name = "dwc_otg_irq",
-+ .start = IFX_USB_IRQ,
++ .start = LQ_USB_INT,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+xway_register_dwc(int pin)
+{
+ lq_enable_irq(resources[1].start);
++ platform_dev.dev.platform_data = (void*) pin;
+ return platform_device_register(&platform_dev);
+}
--- /dev/null
+extern void __init xway_register_dwc(int pin);
+
+#endif
---- a/arch/mips/lantiq/xway/mach-arv45xx.c
-+++ b/arch/mips/lantiq/xway/mach-arv45xx.c
-@@ -24,6 +24,7 @@
- #include <lantiq_platform.h>
-
- #include "devices.h"
-+#include "dev-dwc_otg.h"
-
- #define ARV452_LATCH_SWITCH (1 << 10)
-
-@@ -133,6 +134,7 @@
- lq_register_pci(&lq_pci_data);
- lq_register_wdt();
- arv45xx_register_ethernet();
-+ xway_register_dwc(14);
- }
-
- MIPS_MACHINE(LANTIQ_MACH_ARV4518,
-@@ -152,6 +154,7 @@
- lq_register_pci(&lq_pci_data);
- lq_register_wdt();
- arv45xx_register_ethernet();
-+ xway_register_dwc(28);
- }
-
- MIPS_MACHINE(LANTIQ_MACH_ARV452,
projects / openwrt.git / blobdiff