+-static void ar9003_hw_tx_iq_cal(struct ath_hw *ah)
++static bool ar9003_hw_tx_iq_cal_run(struct ath_hw *ah)
+ {
+ struct ath_common *common = ath9k_hw_common(ah);
+- static const u32 txiqcal_status[AR9300_MAX_CHAINS] = {
+- AR_PHY_TX_IQCAL_STATUS_B0,
+- AR_PHY_TX_IQCAL_STATUS_B1,
+- AR_PHY_TX_IQCAL_STATUS_B2,
+- };
+- static const u32 chan_info_tab[] = {
+- AR_PHY_CHAN_INFO_TAB_0,
+- AR_PHY_CHAN_INFO_TAB_1,
+- AR_PHY_CHAN_INFO_TAB_2,
+- };
+- struct coeff coeff;
+- s32 iq_res[6];
+- s32 i, j, ip, im, nmeasurement;
+- u8 nchains = get_streams(common->tx_chainmask);
+-
+- for (ip = 0; ip < MPASS; ip++) {
+- REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_1,
+- AR_PHY_TX_IQCAQL_CONTROL_1_IQCORR_I_Q_COFF_DELPT,
+- DELPT);
+- REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_START,
+- AR_PHY_TX_IQCAL_START_DO_CAL,
+- AR_PHY_TX_IQCAL_START_DO_CAL);
+-
+- if (!ath9k_hw_wait(ah, AR_PHY_TX_IQCAL_START,
+- AR_PHY_TX_IQCAL_START_DO_CAL,
+- 0, AH_WAIT_TIMEOUT)) {
+- ath_dbg(common, ATH_DBG_CALIBRATE,
+- "Tx IQ Cal not complete.\n");
+- goto TX_IQ_CAL_FAILED;
+- }
+-
+- nmeasurement = REG_READ_FIELD(ah, AR_PHY_TX_IQCAL_STATUS_B0,
+- AR_PHY_CALIBRATED_GAINS_0);
+- if (nmeasurement > MAX_MEASUREMENT)
+- nmeasurement = MAX_MEASUREMENT;
+-
+- for (i = 0; i < nchains; i++) {
+- ath_dbg(common, ATH_DBG_CALIBRATE,
+- "Doing Tx IQ Cal for chain %d.\n", i);
+- for (im = 0; im < nmeasurement; im++) {
+- if (REG_READ(ah, txiqcal_status[i]) &
+- AR_PHY_TX_IQCAL_STATUS_FAILED) {
+- ath_dbg(common, ATH_DBG_CALIBRATE,
+- "Tx IQ Cal failed for chain %d.\n", i);
+- goto TX_IQ_CAL_FAILED;
+- }
+-
+- for (j = 0; j < 3; j++) {
+- u8 idx = 2 * j,
+- offset = 4 * (3 * im + j);
+-
+- REG_RMW_FIELD(ah, AR_PHY_CHAN_INFO_MEMORY,
+- AR_PHY_CHAN_INFO_TAB_S2_READ,
+- 0);
+-
+- /* 32 bits */
+- iq_res[idx] = REG_READ(ah,
+- chan_info_tab[i] +
+- offset);
+-
+- REG_RMW_FIELD(ah, AR_PHY_CHAN_INFO_MEMORY,
+- AR_PHY_CHAN_INFO_TAB_S2_READ,
+- 1);
+-
+- /* 16 bits */
+- iq_res[idx+1] = 0xffff & REG_READ(ah,
+- chan_info_tab[i] +
+- offset);
+-
+- ath_dbg(common, ATH_DBG_CALIBRATE,
+- "IQ RES[%d]=0x%x IQ_RES[%d]=0x%x\n",
+- idx, iq_res[idx], idx+1, iq_res[idx+1]);
+- }
+-
+- if (!ar9003_hw_calc_iq_corr(ah, i, iq_res,
+- coeff.iqc_coeff)) {
+- ath_dbg(common, ATH_DBG_CALIBRATE,
+- "Failed in calculation of IQ correction.\n");
+- goto TX_IQ_CAL_FAILED;
+- }
+- coeff.mag_coeff[i][im][ip] =
+- coeff.iqc_coeff[0] & 0x7f;
+- coeff.phs_coeff[i][im][ip] =
+- (coeff.iqc_coeff[0] >> 7) & 0x7f;
+-
+- if (coeff.mag_coeff[i][im][ip] > 63)
+- coeff.mag_coeff[i][im][ip] -= 128;
+- if (coeff.phs_coeff[i][im][ip] > 63)
+- coeff.phs_coeff[i][im][ip] -= 128;
+-
+- }
+- }
+- }
+-
+- ar9003_hw_tx_iqcal_load_avg_2_passes(ah, nchains, &coeff);
+-
+- return;
+-
+-TX_IQ_CAL_FAILED:
+- ath_dbg(common, ATH_DBG_CALIBRATE, "Tx IQ Cal failed\n");
+-}
+-
+-static void ar9003_hw_tx_iq_cal_run(struct ath_hw *ah)
+-{
+ u8 tx_gain_forced;
+
+- REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_1_9485,
+- AR_PHY_TX_IQCAQL_CONTROL_1_IQCORR_I_Q_COFF_DELPT, DELPT);
+ tx_gain_forced = REG_READ_FIELD(ah, AR_PHY_TX_FORCED_GAIN,
+ AR_PHY_TXGAIN_FORCE);
+ if (tx_gain_forced)
+ REG_RMW_FIELD(ah, AR_PHY_TX_FORCED_GAIN,
+ AR_PHY_TXGAIN_FORCE, 0);
+
+- REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_START_9485,
+- AR_PHY_TX_IQCAL_START_DO_CAL_9485, 1);
++ REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_START,
++ AR_PHY_TX_IQCAL_START_DO_CAL, 1);
++
++ if (!ath9k_hw_wait(ah, AR_PHY_TX_IQCAL_START,
++ AR_PHY_TX_IQCAL_START_DO_CAL, 0,
++ AH_WAIT_TIMEOUT)) {
++ ath_dbg(common, ATH_DBG_CALIBRATE,
++ "Tx IQ Cal is not completed.\n");
++ return false;
++ }
++ return true;