- #define AT91C_UBOOT_DATAFLASH_ADDR 0xC0008000\r
- \r
- // crystal= 18.432MHz\r
--//#define AT91C_PLLA_VALUE 0x2026BE04 // -> 179.712MHz\r
--//#define AT91C_PLLA_MCK 0x0000202\r
-+#define AT91C_PLLA_VALUE 0x2026BE04 // -> 179.712MHz\r
-+#define AT91C_PLLA_MCK 0x0000202\r
- \r
- // crystal= 20.000MHz\r
--#define AT91C_PLLA_VALUE 0x2023BE04 // -> 180MHz\r
--#define AT91C_PLLA_MCK 0x0000202\r
-+//#define AT91C_PLLA_VALUE 0x2023BE04 // -> 180MHz\r
-+//#define AT91C_PLLA_MCK 0x0000202\r
- \r
- #define DELAY_MAIN_FREQ 1000\r
- #define DISP_LINE_LEN 16\r
+ #define AT91C_UBOOT_DATAFLASH_ADDR 0xC0008000
+
+ // crystal= 18.432MHz
+-//#define AT91C_PLLA_VALUE 0x2026BE04 // -> 179.712MHz
+-//#define AT91C_PLLA_MCK 0x0000202
++#define AT91C_PLLA_VALUE 0x2026BE04 // -> 179.712MHz
++#define AT91C_PLLA_MCK 0x0000202
+
+ // crystal= 20.000MHz
+-#define AT91C_PLLA_VALUE 0x2023BE04 // -> 180MHz
+-#define AT91C_PLLA_MCK 0x0000202
++//#define AT91C_PLLA_VALUE 0x2023BE04 // -> 180MHz
++//#define AT91C_PLLA_MCK 0x0000202
+
+ #define DELAY_MAIN_FREQ 1000
+ #define DISP_LINE_LEN 16