+ /* setup COMMAND register */
+ t = PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE |
+ PCI_COMMAND_PARITY|PCI_COMMAND_SERR|PCI_COMMAND_FAST_BACK;
+
+ ar724x_pci_write(ar724x_pci_localcfg_base, PCI_COMMAND, 4, t);
+ ar724x_pci_write(ar724x_pci_localcfg_base, 0x20, 4, 0x1ff01000);
+ ar724x_pci_write(ar724x_pci_localcfg_base, 0x24, 4, 0x1ff01000);
+
+ t = ar724x_pci_rr(AR724X_PCI_REG_RESET);
+ if (t != 0x7) {
+ udelay(100000);
+ ar724x_pci_wr_nf(AR724X_PCI_REG_RESET, 0);
+ udelay(100);
+ ar724x_pci_wr_nf(AR724X_PCI_REG_RESET, 4);
+ udelay(100000);
+ }
+
+ ar724x_pci_wr(AR724X_PCI_REG_APP, AR724X_PCI_APP_LTSSM_ENABLE);
+ udelay(1000);
+
+ t = ar724x_pci_rr(AR724X_PCI_REG_APP);
+ if ((t & AR724X_PCI_APP_LTSSM_ENABLE) == 0x0) {
+ printk(KERN_WARNING "PCI: no PCIe module found\n");
+ return -ENODEV;
+ }
+
+ return 0;
+}
+
+int __init ar724x_pcibios_init(void)
+{
+ int ret;
+