-From a81f936d72caabbcf5698a6636185a8f6630d692 Mon Sep 17 00:00:00 2001
+From b9aae7ff9c6ca6864434882cce9c9c6fea88220b Mon Sep 17 00:00:00 2001
From: Gabor Juhos <juhosg@openwrt.org>
-Date: Fri, 2 Jan 2009 16:08:22 +0100
-Subject: [RFC 03/12] ath9k: introduce bus specific cache size routine
+Date: Mon, 5 Jan 2009 10:57:42 +0100
+Subject: [PATCH v3 03/11] ath9k: introduce bus specific cache size routine
The PCI specific bus_read_cachesize routine won't work on the AHB bus,
we have to replace it with a suitable one later.
+Changes-licensed-under: ISC
+
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
---
- drivers/net/wireless/ath9k/core.h | 7 +++++++
- drivers/net/wireless/ath9k/main.c | 8 +++++---
- 2 files changed, 12 insertions(+), 3 deletions(-)
+ drivers/net/wireless/ath9k/core.h | 10 ++++++++++
+ drivers/net/wireless/ath9k/main.c | 9 +++++++--
+ 2 files changed, 17 insertions(+), 2 deletions(-)
--- a/drivers/net/wireless/ath9k/core.h
+++ b/drivers/net/wireless/ath9k/core.h
-@@ -721,6 +721,8 @@ struct ath_bus_ops {
+@@ -693,6 +693,10 @@ enum PROT_MODE {
+ #define SC_OP_RFKILL_SW_BLOCKED BIT(12)
+ #define SC_OP_RFKILL_HW_BLOCKED BIT(13)
- u32 (*reg_read)(struct ath_hal *ah, unsigned reg);
- void (*reg_write)(struct ath_hal *ah, unsigned reg, u32 val);
-+
++struct ath_bus_ops {
+ void (*read_cachesize)(struct ath_softc *sc, int *csz);
++};
++
+ struct ath_softc {
+ struct ieee80211_hw *hw;
+ struct device *dev;
+@@ -743,6 +747,7 @@ struct ath_softc {
+ #ifdef CONFIG_ATH9K_DEBUG
+ struct ath9k_debug sc_debug;
+ #endif
++ struct ath_bus_ops *bus_ops;
};
- struct ath_softc {
-@@ -843,4 +845,9 @@ static inline void ath_reg_write(struct
- sc->bus_ops->reg_write(ah, reg, val);
- }
+ int ath_reset(struct ath_softc *sc, bool retry_tx);
+@@ -750,4 +755,9 @@ int ath_get_hal_qnum(u16 queue, struct a
+ int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc);
+ int ath_cabq_update(struct ath_softc *);
+static inline void ath_read_cachesize(struct ath_softc *sc, int *csz)
+{
#endif /* CORE_H */
--- a/drivers/net/wireless/ath9k/main.c
+++ b/drivers/net/wireless/ath9k/main.c
-@@ -41,8 +41,7 @@ static struct pci_device_id ath_pci_id_t
- static void ath_detach(struct ath_softc *sc);
+@@ -42,7 +42,7 @@ static void ath_detach(struct ath_softc
/* return bus cachesize in 4B word units */
--
+
-static void bus_read_cachesize(struct ath_softc *sc, int *csz)
+static void ath_pci_read_cachesize(struct ath_softc *sc, int *csz)
{
u8 u8tmp;
-@@ -59,6 +58,7 @@ static void bus_read_cachesize(struct at
- *csz = DEFAULT_CACHELINE >> 2; /* Use the default size */
- }
-
-+
- static void ath_setcurmode(struct ath_softc *sc, enum wireless_mode mode)
- {
- sc->cur_rate_table = sc->hw_rate_table[mode];
-@@ -1347,7 +1347,7 @@ static int ath_init(u16 devid, struct at
+@@ -1340,7 +1340,7 @@ static int ath_init(u16 devid, struct at
* Cache line size is used to size and align various
* structures used to communicate with the hardware.
*/
/* XXX assert csz is non-zero */
sc->sc_cachelsz = csz << 2; /* convert to bytes */
-@@ -2618,6 +2618,8 @@ static struct ath_bus_ops ath_pci_bus_op
+@@ -2538,6 +2538,10 @@ ath_rf_name(u16 rf_version)
+ return "????";
+ }
- .reg_read = ath_pci_reg_read,
- .reg_write = ath_pci_reg_write,
-+
++static struct ath_bus_ops ath_pci_bus_ops = {
+ .read_cachesize = ath_pci_read_cachesize,
- };
-
++};
++
static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
+ {
+ void __iomem *mem;
+@@ -2626,6 +2630,7 @@ static int ath_pci_probe(struct pci_dev
+ sc->hw = hw;
+ sc->dev = &pdev->dev;
+ sc->mem = mem;
++ sc->bus_ops = &ath_pci_bus_ops;
+
+ if (ath_attach(id->device, sc) != 0) {
+ ret = -ENODEV;