--- a/drivers/ide/Kconfig
+++ b/drivers/ide/Kconfig
-@@ -712,6 +712,11 @@ config BLK_DEV_IDE_AU1XXX_SEQTS_PER_RQ
- default "128"
- depends on BLK_DEV_IDE_AU1XXX
+@@ -717,6 +717,11 @@ config BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
+ depends on SOC_AU1200 && BLK_DEV_IDE_AU1XXX
+ endchoice
+config BLK_DEV_IDE_MAGICBOX
+ tristate "Magicbox CF card support"
-+ depends on MAGICBOXV2 || OPENRB_LIGHT
++ depends on MAGICBOX || OPENRB_LIGHT
+ select IDE_XFER_MODE
+
config BLK_DEV_IDE_TX4938
depends on SOC_TX4938
--- a/drivers/ide/Makefile
+++ b/drivers/ide/Makefile
-@@ -110,6 +110,7 @@ obj-$(CONFIG_BLK_DEV_IDE_RAPIDE) += rapi
+@@ -113,6 +113,7 @@ obj-$(CONFIG_BLK_DEV_IDE_RAPIDE) += rapi
obj-$(CONFIG_BLK_DEV_PALMCHIP_BK3710) += palm_bk3710.o
obj-$(CONFIG_BLK_DEV_IDE_AU1XXX) += au1xxx-ide.o
obj-$(CONFIG_BLK_DEV_IDE_TX4939) += tx4939ide.o
--- /dev/null
+++ b/drivers/ide/magicbox_ide.c
-@@ -0,0 +1,332 @@
+@@ -0,0 +1,293 @@
+/*
+ * IDE driver for the MagicBox 2.0 onboard CompactFlash slot.
+ *
+#define DRV_DESC "IDE driver for Magicbox 2.0 onboard CF slot"
+#define DRV_NAME "magicbox_cf"
+
-+static u8 magicbox_ide_inb(unsigned long port)
++static inline u8 magicbox_ide_inb(unsigned long port)
+{
+ return (u8) (readw((void __iomem *) port) >> 8) & 0xff;
+}
+
-+static void magicbox_ide_outb(u8 value, unsigned long port)
++static inline void magicbox_ide_outb(u8 value, unsigned long port)
+{
+ writew(value << 8, (void __iomem *) port);
+}
+ return magicbox_ide_inb(hwif->io_ports.ctl_addr);
+}
+
-+static void magicbox_ide_tf_load(ide_drive_t *drive, ide_task_t *task)
++static void magicbox_ide_write_devctl(ide_hwif_t *hwif, u8 ctl)
++{
++ magicbox_ide_outb(ctl, hwif->io_ports.ctl_addr);
++}
++
++static void magicbox_ide_tf_load(ide_drive_t *drive, struct ide_taskfile *tf,
++ u8 valid)
+{
+ struct ide_io_ports *io_ports = &drive->hwif->io_ports;
-+ struct ide_taskfile *tf = &task->tf;
-+ u8 HIHI = (task->tf_flags & IDE_TFLAG_LBA48) ? 0xE0 : 0xEF;
-+
-+ if (task->tf_flags & IDE_TFLAG_FLAGGED)
-+ HIHI = 0xFF;
-+
-+ if (task->tf_flags & IDE_TFLAG_OUT_DATA)
-+ writel((tf->hob_data << 8) | tf->data,
-+ (void __iomem *) io_ports->data_addr);
-+
-+ if (task->tf_flags & IDE_TFLAG_OUT_HOB_FEATURE)
-+ magicbox_ide_outb(tf->hob_feature, io_ports->feature_addr);
-+ if (task->tf_flags & IDE_TFLAG_OUT_HOB_NSECT)
-+ magicbox_ide_outb(tf->hob_nsect, io_ports->nsect_addr);
-+ if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAL)
-+ magicbox_ide_outb(tf->hob_lbal, io_ports->lbal_addr);
-+ if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAM)
-+ magicbox_ide_outb(tf->hob_lbam, io_ports->lbam_addr);
-+ if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAH)
-+ magicbox_ide_outb(tf->hob_lbah, io_ports->lbah_addr);
-+
-+ if (task->tf_flags & IDE_TFLAG_OUT_FEATURE)
++
++ if (valid & IDE_VALID_FEATURE)
+ magicbox_ide_outb(tf->feature, io_ports->feature_addr);
-+ if (task->tf_flags & IDE_TFLAG_OUT_NSECT)
++ if (valid & IDE_VALID_NSECT)
+ magicbox_ide_outb(tf->nsect, io_ports->nsect_addr);
-+ if (task->tf_flags & IDE_TFLAG_OUT_LBAL)
++ if (valid & IDE_VALID_LBAL)
+ magicbox_ide_outb(tf->lbal, io_ports->lbal_addr);
-+ if (task->tf_flags & IDE_TFLAG_OUT_LBAM)
++ if (valid & IDE_VALID_LBAM)
+ magicbox_ide_outb(tf->lbam, io_ports->lbam_addr);
-+ if (task->tf_flags & IDE_TFLAG_OUT_LBAH)
++ if (valid & IDE_VALID_LBAH)
+ magicbox_ide_outb(tf->lbah, io_ports->lbah_addr);
+
-+ if (task->tf_flags & IDE_TFLAG_OUT_DEVICE)
-+ magicbox_ide_outb((tf->device & HIHI) | drive->select,
-+ io_ports->device_addr);
++ if (valid & IDE_VALID_DEVICE)
++ magicbox_ide_outb(tf->device, io_ports->device_addr);
+}
+
-+static void magicbox_ide_tf_read(ide_drive_t *drive, ide_task_t *task)
++static void magicbox_ide_tf_read(ide_drive_t *drive, struct ide_taskfile *tf,
++ u8 valid)
+{
+ struct ide_io_ports *io_ports = &drive->hwif->io_ports;
-+ struct ide_taskfile *tf = &task->tf;
-+
-+ if (task->tf_flags & IDE_TFLAG_IN_DATA) {
-+ u16 data = (u16) readl((void __iomem *) io_ports->data_addr);
-+
-+ tf->data = data & 0xff;
-+ tf->hob_data = (data >> 8) & 0xff;
-+ }
-+
-+ /* be sure we're looking at the low order bits */
-+ magicbox_ide_outb(ATA_DEVCTL_OBS & ~0x80, io_ports->ctl_addr);
+
-+ if (task->tf_flags & IDE_TFLAG_IN_NSECT)
++ if (valid & IDE_VALID_NSECT)
+ tf->nsect = magicbox_ide_inb(io_ports->nsect_addr);
-+ if (task->tf_flags & IDE_TFLAG_IN_LBAL)
++ if (valid & IDE_VALID_LBAL)
+ tf->lbal = magicbox_ide_inb(io_ports->lbal_addr);
-+ if (task->tf_flags & IDE_TFLAG_IN_LBAM)
++ if (valid & IDE_VALID_LBAM)
+ tf->lbam = magicbox_ide_inb(io_ports->lbam_addr);
-+ if (task->tf_flags & IDE_TFLAG_IN_LBAH)
++ if (valid & IDE_VALID_LBAH)
+ tf->lbah = magicbox_ide_inb(io_ports->lbah_addr);
-+ if (task->tf_flags & IDE_TFLAG_IN_DEVICE)
++ if (valid & IDE_VALID_DEVICE)
+ tf->device = magicbox_ide_inb(io_ports->device_addr);
-+
-+ if (task->tf_flags & IDE_TFLAG_LBA48) {
-+ magicbox_ide_outb(ATA_DEVCTL_OBS | 0x80, io_ports->ctl_addr);
-+
-+ if (task->tf_flags & IDE_TFLAG_IN_HOB_FEATURE)
-+ tf->hob_feature = magicbox_ide_inb(io_ports->feature_addr);
-+ if (task->tf_flags & IDE_TFLAG_IN_HOB_NSECT)
-+ tf->hob_nsect = magicbox_ide_inb(io_ports->nsect_addr);
-+ if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAL)
-+ tf->hob_lbal = magicbox_ide_inb(io_ports->lbal_addr);
-+ if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAM)
-+ tf->hob_lbam = magicbox_ide_inb(io_ports->lbam_addr);
-+ if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAH)
-+ tf->hob_lbah = magicbox_ide_inb(io_ports->lbah_addr);
-+ }
+}
+
-+static void magicbox_ide_input_data(ide_drive_t *drive, struct request *rq,
++static void magicbox_ide_input_data(ide_drive_t *drive, struct ide_cmd *cmd,
+ void *buf, unsigned int len)
+{
+ unsigned long port = drive->hwif->io_ports.data_addr;
+
+ if ((len & 3) >= 2)
+ magicbox_ide_insw(port, (u8 *)buf + (len & ~3), 1);
-+ } else
++ } else {
+ magicbox_ide_insw(port, buf, len / 2);
++ }
+}
+
-+static void magicbox_ide_output_data(ide_drive_t *drive, struct request *rq,
++static void magicbox_ide_output_data(ide_drive_t *drive, struct ide_cmd *cmd,
+ void *buf, unsigned int len)
+{
+ unsigned long port = drive->hwif->io_ports.data_addr;
+
+ if ((len & 3) >= 2)
+ magicbox_ide_outsw(port, (u8 *)buf + (len & ~3), 1);
-+ } else
++ } else {
+ magicbox_ide_outsw(port, buf, len / 2);
++ }
+}
+
+static void magicbox_ide_set_pio_mode(ide_drive_t *drive, const u8 pio)
+ .exec_command = magicbox_ide_exec_command,
+ .read_status = magicbox_ide_read_status,
+ .read_altstatus = magicbox_ide_read_altstatus,
++ .write_devctl = magicbox_ide_write_devctl,
+
-+ .set_irq = ide_set_irq,
++ .dev_select = ide_dev_select,
+ .tf_load = magicbox_ide_tf_load,
+ .tf_read = magicbox_ide_tf_read,
+
+ * with CS1 active instead of CS0
+ */
+ hw->io_ports.ctl_addr = (unsigned long)ctrl + (6 * 2);
-+
+ hw->irq = irq;
+ hw->chipset = ide_generic;
+ hw->ack_intr = NULL;
+ goto err_unmap_base;
+ }
+
-+ magicbox_ide_setup_hw(&hw, base, ctrl, irq);
-+
+ hw.dev = &op->dev;
++ magicbox_ide_setup_hw(&hw, base, ctrl, irq);
+
+ ret = ide_host_add(&magicbox_ide_port_info, hws, &host);
+ if (ret)
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