--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
-@@ -100,6 +100,19 @@ config BCM63XX
+@@ -102,6 +102,19 @@ config BCM63XX
help
Support for BCM63XX based boards
config MIPS_COBALT
bool "Cobalt Server"
select CEVT_R4K
-@@ -714,6 +727,7 @@ config CAVIUM_OCTEON_REFERENCE_BOARD
+@@ -716,6 +729,7 @@ config CAVIUM_OCTEON_REFERENCE_BOARD
endchoice
+obj-$(CONFIG_ATHEROS_AR2315) += ar2315.o
--- /dev/null
+++ b/arch/mips/ar231x/board.c
-@@ -0,0 +1,251 @@
+@@ -0,0 +1,258 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ u8 *bcfg, *rcfg;
+ u8 *board_data;
+ u8 *radio_data;
++ u8 *mac_addr;
+ u32 offset;
+
+ ar231x_board.config = NULL;
+ rcfg_size = BOARD_CONFIG_BUFSZ - offset;
+ memcpy(radio_data, rcfg, rcfg_size);
+
++ mac_addr = &radio_data[0x1d * 2];
++ if (is_broadcast_ether_addr(mac_addr)) {
++ printk(KERN_INFO "Radio MAC is blank; using board-data\n");
++ memcpy(mac_addr, ar231x_board.config->wlan0_mac, ETH_ALEN);
++ }
++
+ return 0;
+}
+
+#endif /* __ASM_MACH_ATHEROS_CPU_FEATURE_OVERRIDES_H */
--- /dev/null
+++ b/arch/mips/include/asm/mach-ar231x/dma-coherence.h
-@@ -0,0 +1,64 @@
+@@ -0,0 +1,76 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+
+#define PCI_DMA_OFFSET 0x20000000
+
-+struct device;
++#include <linux/device.h>
++
++static inline dma_addr_t ar231x_dev_offset(struct device *dev)
++{
++#ifdef CONFIG_PCI
++ extern struct bus_type pci_bus_type;
++
++ if (dev && dev->bus == &pci_bus_type)
++ return PCI_DMA_OFFSET;
++ else
++#endif
++ return 0;
++}
+
+static inline dma_addr_t plat_map_dma_mem(struct device *dev, void *addr, size_t size)
+{
-+ return virt_to_phys(addr) + (dev != NULL ? PCI_DMA_OFFSET : 0);
++ return virt_to_phys(addr) + ar231x_dev_offset(dev);
+}
+
+static inline dma_addr_t plat_map_dma_mem_page(struct device *dev, struct page *page)
+{
-+ return page_to_phys(page) + (dev != NULL ? PCI_DMA_OFFSET : 0);
++ return page_to_phys(page) + ar231x_dev_offset(dev);
+}
+
+static inline unsigned long plat_dma_addr_to_phys(struct device *dev,
+ dma_addr_t dma_addr)
+{
-+ return (dma_addr > PCI_DMA_OFFSET ? dma_addr - PCI_DMA_OFFSET : dma_addr);
++ return dma_addr - ar231x_dev_offset(dev);
+}
+
+static inline void plat_unmap_dma_mem(struct device *dev, dma_addr_t dma_addr,
+#endif /* __ASM_MACH_GENERIC_DMA_COHERENCE_H */
--- /dev/null
+++ b/arch/mips/include/asm/mach-ar231x/gpio.h
-@@ -0,0 +1,79 @@
+@@ -0,0 +1,84 @@
+#ifndef _ATHEROS_GPIO_H_
+#define _ATHEROS_GPIO_H_
+
+ return (irq - (AR531X_GPIO_IRQ(0)));
+}
+
++static inline int gpio_set_debounce(unsigned gpio, unsigned debounce)
++{
++ return -ENOSYS;
++}
++
+#include <asm-generic/gpio.h> /* cansleep wrappers */
+
+#endif
+ * Address map
+ */
+#define AR2315_SPI_READ 0x08000000 /* SPI FLASH */
-+#define AR2315_WLAN0 0xB0000000 /* Wireless MMR */
-+#define AR2315_PCI 0xB0100000 /* PCI MMR */
-+#define AR2315_SDRAMCTL 0xB0300000 /* SDRAM MMR */
-+#define AR2315_LOCAL 0xB0400000 /* LOCAL BUS MMR */
-+#define AR2315_ENET0 0xB0500000 /* ETHERNET MMR */
-+#define AR2315_DSLBASE 0xB1000000 /* RESET CONTROL MMR */
-+#define AR2315_UART0 0xB1100003 /* UART MMR */
-+#define AR2315_SPI 0xB1300000 /* SPI FLASH MMR */
++#define AR2315_WLAN0 0x10000000 /* Wireless MMR */
++#define AR2315_PCI 0x10100000 /* PCI MMR */
++#define AR2315_SDRAMCTL 0x10300000 /* SDRAM MMR */
++#define AR2315_LOCAL 0x10400000 /* LOCAL BUS MMR */
++#define AR2315_ENET0 0x10500000 /* ETHERNET MMR */
++#define AR2315_DSLBASE 0x11000000 /* RESET CONTROL MMR */
++#define AR2315_UART0 0x11100003 /* UART MMR */
++#define AR2315_SPI 0x11300000 /* SPI FLASH MMR */
+#define AR2315_PCIEXT 0x80000000 /* pci external */
+
+/*
+#endif /* __AR2315_REG_H */
--- /dev/null
+++ b/arch/mips/include/asm/mach-ar231x/ar5312_regs.h
-@@ -0,0 +1,236 @@
+@@ -0,0 +1,232 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+#define AR5212_AR5312_REV2 0x0052 /* AR5312 WMAC (AP31) */
+#define AR5212_AR5312_REV7 0x0057 /* AR5312 WMAC (AP30-040) */
+#define AR5212_AR2313_REV8 0x0058 /* AR2313 WMAC (AP43-030) */
-+#define AR531X_RADIO_MASK_OFF 0xc8
-+#define AR531X_RADIO0_MASK 0x0003
-+#define AR531X_RADIO1_MASK 0x000c
-+#define AR531X_RADIO1_S 2
+
+/*
+ * AR531X_NUM_WMAC defines the number of Wireless MACs that\
+
--- /dev/null
+++ b/arch/mips/ar231x/ar5312.c
-@@ -0,0 +1,549 @@
+@@ -0,0 +1,529 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+{
+ struct ar231x_boarddata *config;
+ u32 fctl = 0;
-+ const u8 *radio;
+ u8 *c;
+
+ if (!is_5312())
+ ar231x_find_config(ar5312_flash_limit());
+ config = ar231x_board.config;
+
-+
-+ /*
-+ * Chip IDs and hardware detection for some Atheros
-+ * models are really broken!
-+ *
-+ * Atheros uses a disabled WMAC0 and Silicon ID of AR5312
-+ * as indication for AR2312, which is otherwise
-+ * indistinguishable from the real AR5312.
-+ */
-+ if (ar231x_board.radio) {
-+ radio = ar231x_board.radio + AR531X_RADIO_MASK_OFF;
-+ if ((*((const u32 *) radio) & AR531X_RADIO0_MASK) == 0)
-+ config->flags |= BD_ISCASPER;
-+ } else
-+ radio = NULL;
-+
+ /* AR2313 has CPU minor rev. 10 */
+ if ((current_cpu_data.processor_id & 0xff) == 0x0a)
+ ar231x_devtype = DEV_TYPE_AR2313;
+ if (!ar231x_board.radio)
+ return 0;
+
-+ if ((*((u32 *) radio) & AR531X_RADIO0_MASK) &&
-+ (config->flags & BD_WLAN0))
-+ ar231x_add_wmac(0, AR531X_WLAN0,
-+ AR5312_IRQ_WLAN0_INTRS);
++ if (!(config->flags & BD_WLAN0))
++ break;
+
++ ar231x_add_wmac(0, AR531X_WLAN0, AR5312_IRQ_WLAN0_INTRS);
+ break;
+ /*
+ * AR2312/3 ethernet uses the PHY of ENET0, but the MAC
+ break;
+ }
+
-+ if ((*((u32 *) radio) & AR531X_RADIO1_MASK) &&
-+ (config->flags & BD_WLAN1))
-+ ar231x_add_wmac(1, AR531X_WLAN1,
-+ AR5312_IRQ_WLAN1_INTRS);
++ if (config->flags & BD_WLAN1)
++ ar231x_add_wmac(1, AR531X_WLAN1, AR5312_IRQ_WLAN1_INTRS);
+
+ return 0;
+}
+ .reset_base = AR2315_RESET,
+ .reset_mac = AR2315_RESET_ENET0,
+ .reset_phy = AR2315_RESET_EPHY0,
-+ .phy_base = AR2315_ENET0,
++ .phy_base = KSEG1ADDR(AR2315_ENET0),
+ .config = &ar231x_board,
+};
+
+static inline u32
+spiflash_read_reg(int reg)
+{
-+ return ar231x_read_reg(KSEG1ADDR(AR2315_SPI) + reg);
++ return ar231x_read_reg(AR2315_SPI + reg);
+}
+
+static inline void
+spiflash_write_reg(int reg, u32 data)
+{
-+ ar231x_write_reg(KSEG1ADDR(AR2315_SPI) + reg, data);
++ ar231x_write_reg(AR2315_SPI + reg, data);
+}
+
+static u32
+ ar2315_init_gpio();
+ platform_device_register(&ar2315_wdt);
+ platform_device_register(&ar2315_spiflash);
-+ ar231x_add_ethernet(0, AR2315_ENET0, AR2315_IRQ_ENET0_INTRS,
++ ar231x_add_ethernet(0, KSEG1ADDR(AR2315_ENET0), AR2315_IRQ_ENET0_INTRS,
+ &ar2315_eth_data);
+ ar231x_add_wmac(0, AR2315_WLAN0, AR2315_IRQ_WLAN0_INTRS);
+