ramips: make rt2880_pci_base static

[openwrt.git] / target / linux / ramips / files / arch / mips / pci / pci-rt288x.c

diff --git a/target/linux/ramips/files/arch/mips/pci/pci-rt288x.c b/target/linux/ramips/files/arch/mips/pci/pci-rt288x.c
index e3b05d0..fb3a6b1 100644 (file)
--- a/target/linux/ramips/files/arch/mips/pci/pci-rt288x.c
+++ b/target/linux/ramips/files/arch/mips/pci/pci-rt288x.c
@@ -1,3 +1,16 @@
+/*
+ *  Ralink RT288x SoC PCI register definitions
+ *
+ *  Copyright (C) 2009 John Crispin <blogic@openwrt.org>
+ *  Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
+ *
+ *  Parts of this file are based on Ralink's 2.6.21 BSP
+ *
+ *  This program is free software; you can redistribute it and/or modify it
+ *  under the terms of the GNU General Public License version 2 as published
+ *  by the Free Software Foundation.
+ */
+
 #include <linux/types.h>
 #include <linux/pci.h>
 #include <linux/io.h>
@@ -6,7 +19,10 @@
 #include <asm/mach-ralink/rt288x.h>
 #include <asm/mach-ralink/rt288x_regs.h>
 
-#define RT2880_PCI_SLOT1_BASE          0x20000000
+#define RT2880_PCI_MEM_BASE    0x20000000
+#define RT2880_PCI_MEM_SIZE    0x10000000
+#define RT2880_PCI_IO_BASE     0x00460000
+#define RT2880_PCI_IO_SIZE     0x00010000
 
 #define RT2880_PCI_REG_PCICFG_ADDR     0x00
 #define RT2880_PCI_REG_PCIMSK_ADDR     0x0c
@@ -24,7 +40,7 @@
 #define PCI_ACCESS_READ  0
 #define PCI_ACCESS_WRITE 1
 
-void __iomem *rt2880_pci_base;
+static void __iomem *rt2880_pci_base;
 
 static u32 rt2880_pci_reg_read(u32 reg)
 {
@@ -36,8 +52,8 @@ static void rt2880_pci_reg_write(u32 val, u32 reg)
        writel(val, rt2880_pci_base + reg);
 }
 
-static int config_access(unsigned char access_type, struct pci_bus *bus,
-                        unsigned int devfn, unsigned char where, u32 *data)
+static void config_access(unsigned char access_type, struct pci_bus *bus,
+                         unsigned int devfn, unsigned char where, u32 *data)
 {
        unsigned int slot = PCI_SLOT(devfn);
        unsigned int address;
@@ -51,8 +67,6 @@ static int config_access(unsigned char access_type, struct pci_bus *bus,
                rt2880_pci_reg_write(*data, RT2880_PCI_REG_CONFIG_DATA);
        else
                *data = rt2880_pci_reg_read(RT2880_PCI_REG_CONFIG_DATA);
-
-       return 0;
 }
 
 static int rt2880_pci_config_read(struct pci_bus *bus, unsigned int devfn,
@@ -60,8 +74,7 @@ static int rt2880_pci_config_read(struct pci_bus *bus, unsigned int devfn,
 {
        u32 data = 0;
 
-       if (config_access(PCI_ACCESS_READ, bus, devfn, where, &data))
-               return PCIBIOS_DEVICE_NOT_FOUND;
+       config_access(PCI_ACCESS_READ, bus, devfn, where, &data);
 
        if (size == 1)
                *val = (data >> ((where & 3) << 3)) & 0xff;
@@ -81,8 +94,7 @@ static int rt2880_pci_config_write(struct pci_bus *bus, unsigned int devfn,
        if (size == 4) {
                data = val;
        } else {
-               if (config_access(PCI_ACCESS_READ, bus, devfn, where, &data))
-                       return PCIBIOS_DEVICE_NOT_FOUND;
+               config_access(PCI_ACCESS_READ, bus, devfn, where, &data);
                if (size == 1)
                        data = (data & ~(0xff << ((where & 3) << 3))) |
                               (val << ((where & 3) << 3));
@@ -91,8 +103,7 @@ static int rt2880_pci_config_write(struct pci_bus *bus, unsigned int devfn,
                               (val << ((where & 3) << 3));
        }
 
-       if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data))
-               return PCIBIOS_DEVICE_NOT_FOUND;
+       config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data);
 
        return PCIBIOS_SUCCESSFUL;
 }
@@ -104,15 +115,15 @@ static struct pci_ops rt2880_pci_ops = {
 
 static struct resource rt2880_pci_io_resource = {
        .name   = "PCI MEM space",
-       .start  = 0x20000000,
-       .end    = 0x2FFFFFFF,
+       .start  = RT2880_PCI_MEM_BASE,
+       .end    = RT2880_PCI_MEM_BASE + RT2880_PCI_MEM_SIZE - 1,
        .flags  = IORESOURCE_MEM,
 };
 
 static struct resource rt2880_pci_mem_resource = {
        .name   = "PCI IO space",
-       .start  = 0x00460000,
-       .end    = 0x0046FFFF,
+       .start  = RT2880_PCI_IO_BASE,
+       .end    = RT2880_PCI_IO_BASE + RT2880_PCI_IO_SIZE - 1,
        .flags  = IORESOURCE_IO,
 };
 
@@ -122,9 +133,9 @@ static struct pci_controller rt2880_pci_controller = {
        .io_resource    = &rt2880_pci_mem_resource,
 };
 
-void inline read_config(unsigned long bus, unsigned long dev,
-                       unsigned long func, unsigned long reg,
-                       unsigned long *val)
+static inline void read_config(unsigned long bus, unsigned long dev,
+                              unsigned long func, unsigned long reg,
+                              unsigned long *val)
 {
        unsigned long address;
 
@@ -134,9 +145,9 @@ void inline read_config(unsigned long bus, unsigned long dev,
        *val = rt2880_pci_reg_read(RT2880_PCI_REG_CONFIG_DATA);
 }
 
-void inline write_config(unsigned long bus, unsigned long dev,
-                        unsigned long func, unsigned long reg,
-                        unsigned long val)
+static inline void write_config(unsigned long bus, unsigned long dev,
+                               unsigned long func, unsigned long reg,
+                               unsigned long val)
 {
        unsigned long address;
 
@@ -194,8 +205,8 @@ static int __init rt2880_pci_init(void)
 
        rt2880_pci_reg_write(0x79, RT2880_PCI_REG_ARBCTL);
        rt2880_pci_reg_write(0x07FF0001, RT2880_PCI_REG_BAR0SETUP_ADDR);
-       rt2880_pci_reg_write(RT2880_PCI_SLOT1_BASE, RT2880_PCI_REG_MEMBASE);
-       rt2880_pci_reg_write(0x00460000, RT2880_PCI_REG_IOBASE);
+       rt2880_pci_reg_write(RT2880_PCI_MEM_BASE, RT2880_PCI_REG_MEMBASE);
+       rt2880_pci_reg_write(RT2880_PCI_IO_BASE, RT2880_PCI_REG_IOBASE);
        rt2880_pci_reg_write(0x08000000, RT2880_PCI_REG_IMBASEBAR0_ADDR);
        rt2880_pci_reg_write(0x08021814, RT2880_PCI_REG_ID);
        rt2880_pci_reg_write(0x00800001, RT2880_PCI_REG_CLASS);