--- a/drivers/ssb/driver_chipcommon.c
+++ b/drivers/ssb/driver_chipcommon.c
+@@ -3,7 +3,7 @@
+ * Broadcom ChipCommon core driver
+ *
+ * Copyright 2005, Broadcom Corporation
+- * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
++ * Copyright 2006, 2007, Michael Buesch <m@bues.ch>
+ *
+ * Licensed under the GNU/GPL. See COPYING for details.
+ */
@@ -46,40 +46,66 @@ void ssb_chipco_set_clockmode(struct ssb
if (!ccdev)
return;
{
--- a/drivers/ssb/driver_chipcommon_pmu.c
+++ b/drivers/ssb/driver_chipcommon_pmu.c
+@@ -2,7 +2,7 @@
+ * Sonics Silicon Backplane
+ * Broadcom ChipCommon Power Management Unit driver
+ *
+- * Copyright 2009, Michael Buesch <mb@bu3sch.de>
++ * Copyright 2009, Michael Buesch <m@bues.ch>
+ * Copyright 2007, Broadcom Corporation
+ *
+ * Licensed under the GNU/GPL. See COPYING for details.
@@ -332,6 +332,12 @@ static void ssb_pmu_pll_init(struct ssb_
case 0x5354:
ssb_pmu0_pllinit_r0(cc, crystalfreq);
}
--- a/drivers/ssb/driver_gige.c
+++ b/drivers/ssb/driver_gige.c
+@@ -3,7 +3,7 @@
+ * Broadcom Gigabit Ethernet core driver
+ *
+ * Copyright 2008, Broadcom Corporation
+- * Copyright 2008, Michael Buesch <mb@bu3sch.de>
++ * Copyright 2008, Michael Buesch <m@bues.ch>
+ *
+ * Licensed under the GNU/GPL. See COPYING for details.
+ */
@@ -12,6 +12,7 @@
#include <linux/ssb/ssb_driver_gige.h>
#include <linux/pci.h>
u32 base, tmslow, tmshigh;
--- a/drivers/ssb/driver_mipscore.c
+++ b/drivers/ssb/driver_mipscore.c
+@@ -3,7 +3,7 @@
+ * Broadcom MIPS core driver
+ *
+ * Copyright 2005, Broadcom Corporation
+- * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
++ * Copyright 2006, 2007, Michael Buesch <m@bues.ch>
+ *
+ * Licensed under the GNU/GPL. See COPYING for details.
+ */
@@ -270,7 +270,6 @@ void ssb_mipscore_init(struct ssb_mipsco
set_irq(dev, irq++);
}
ssb_dprintk(KERN_INFO PFX "after irq reconfiguration\n");
--- a/drivers/ssb/driver_pcicore.c
+++ b/drivers/ssb/driver_pcicore.c
+@@ -3,7 +3,7 @@
+ * Broadcom PCI-core driver
+ *
+ * Copyright 2005, Broadcom Corporation
+- * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
++ * Copyright 2006, 2007, Michael Buesch <m@bues.ch>
+ *
+ * Licensed under the GNU/GPL. See COPYING for details.
+ */
@@ -15,6 +15,11 @@
#include "ssb_private.h"
{
struct ssb_bus *bus = pc->dev->bus;
u16 chipid_top;
-@@ -432,25 +408,133 @@ static int pcicore_is_in_hostmode(struct
+@@ -432,25 +408,137 @@ static int pcicore_is_in_hostmode(struct
}
#endif /* CONFIG_SSB_PCICORE_HOSTMODE */
-static void ssb_pcicore_init_clientmode(struct ssb_pcicore *pc)
+static void __devinit ssb_pcicore_init_clientmode(struct ssb_pcicore *pc)
{
-+ ssb_pcicore_fix_sprom_core_index(pc);
++ struct ssb_device *pdev = pc->dev;
++ struct ssb_bus *bus = pdev->bus;
++
++ if (bus->bustype == SSB_BUSTYPE_PCI)
++ ssb_pcicore_fix_sprom_core_index(pc);
+
/* Disable PCI interrupts. */
- ssb_write32(pc->dev, SSB_INTVEC, 0);
+- ssb_write32(pc->dev, SSB_INTVEC, 0);
++ ssb_write32(pdev, SSB_INTVEC, 0);
+
+ /* Additional PCIe always once-executed workarounds */
+ if (pc->dev->id.coreid == SSB_DEV_PCIE) {
if (!ssb_device_is_enabled(dev))
ssb_device_enable(dev, 0);
-@@ -475,58 +559,104 @@ static void ssb_pcie_write(struct ssb_pc
+@@ -475,58 +563,104 @@ static void ssb_pcie_write(struct ssb_pc
pcicore_write32(pc, 0x134, data);
}
}
int ssb_pcicore_dev_irqvecs_enable(struct ssb_pcicore *pc,
-@@ -551,13 +681,13 @@ int ssb_pcicore_dev_irqvecs_enable(struc
+@@ -551,13 +685,13 @@ int ssb_pcicore_dev_irqvecs_enable(struc
might_sleep_if(pdev->id.coreid != SSB_DEV_PCI);
/* Enable interrupts for this device. */
err = pci_read_config_dword(bus->host_pci, SSB_PCI_IRQMASK, &tmp);
if (err)
goto out;
-@@ -579,48 +709,10 @@ int ssb_pcicore_dev_irqvecs_enable(struc
+@@ -579,48 +713,10 @@ int ssb_pcicore_dev_irqvecs_enable(struc
if (pc->setup_done)
goto out;
if (pdev->id.coreid == SSB_DEV_PCI) {
out:
--- a/drivers/ssb/main.c
+++ b/drivers/ssb/main.c
-@@ -18,6 +18,7 @@
+@@ -3,7 +3,7 @@
+ * Subsystem core
+ *
+ * Copyright 2005, Broadcom Corporation
+- * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
++ * Copyright 2006, 2007, Michael Buesch <m@bues.ch>
+ *
+ * Licensed under the GNU/GPL. See COPYING for details.
+ */
+@@ -12,12 +12,14 @@
+
+ #include <linux/delay.h>
+ #include <linux/io.h>
++#include <linux/module.h>
+ #include <linux/ssb/ssb.h>
+ #include <linux/ssb/ssb_regs.h>
+ #include <linux/ssb/ssb_driver_gige.h>
#include <linux/dma-mapping.h>
#include <linux/pci.h>
#include <linux/mmc/sdio_func.h>
#include <pcmcia/cs_types.h>
#include <pcmcia/cs.h>
-@@ -140,6 +141,19 @@ static void ssb_device_put(struct ssb_de
+@@ -140,6 +142,19 @@ static void ssb_device_put(struct ssb_de
put_device(dev->dev);
}
static int ssb_device_resume(struct device *dev)
{
struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
-@@ -210,90 +224,81 @@ int ssb_bus_suspend(struct ssb_bus *bus)
+@@ -210,90 +225,81 @@ int ssb_bus_suspend(struct ssb_bus *bus)
EXPORT_SYMBOL(ssb_bus_suspend);
#ifdef CONFIG_SSB_SPROM
- if (!dev->dev ||
- !dev->dev->driver ||
- !device_is_registered(dev->dev))
-- continue;
-- drv = drv_to_ssb_drv(dev->dev->driver);
-- if (!drv)
+ sdrv = ssb_driver_get(drv_to_ssb_drv(sdev->dev->driver));
+ if (!sdrv || SSB_WARN_ON(!sdrv->remove)) {
+ ssb_device_put(sdev);
continue;
+- drv = drv_to_ssb_drv(dev->dev->driver);
+- if (!drv)
+- continue;
- err = drv->suspend(dev, state);
- if (err) {
- ssb_printk(KERN_ERR PFX "Failed to freeze device %s\n",
}
#endif /* CONFIG_SSB_SPROM */
-@@ -380,6 +385,35 @@ static int ssb_device_uevent(struct devi
+@@ -380,6 +386,35 @@ static int ssb_device_uevent(struct devi
ssb_dev->id.revision);
}
static struct bus_type ssb_bustype = {
.name = "ssb",
.match = ssb_bus_match,
-@@ -389,6 +423,7 @@ static struct bus_type ssb_bustype = {
+@@ -389,6 +424,7 @@ static struct bus_type ssb_bustype = {
.suspend = ssb_device_suspend,
.resume = ssb_device_resume,
.uevent = ssb_device_uevent,
};
static void ssb_buses_lock(void)
-@@ -481,6 +516,7 @@ static int ssb_devices_register(struct s
+@@ -481,6 +517,7 @@ static int ssb_devices_register(struct s
#ifdef CONFIG_SSB_PCIHOST
sdev->irq = bus->host_pci->irq;
dev->parent = &bus->host_pci->dev;
#endif
break;
case SSB_BUSTYPE_PCMCIA:
-@@ -490,13 +526,13 @@ static int ssb_devices_register(struct s
+@@ -490,13 +527,13 @@ static int ssb_devices_register(struct s
#endif
break;
case SSB_BUSTYPE_SDIO:
break;
}
-@@ -523,7 +559,7 @@ error:
+@@ -523,7 +560,7 @@ error:
}
/* Needs ssb_buses_lock() */
{
struct ssb_bus *bus, *n;
int err = 0;
-@@ -734,9 +770,9 @@ out:
+@@ -734,9 +771,9 @@ out:
return err;
}
{
int err;
-@@ -817,8 +853,8 @@ err_disable_xtal:
+@@ -817,8 +854,8 @@ err_disable_xtal:
}
#ifdef CONFIG_SSB_PCIHOST
{
int err;
-@@ -830,6 +866,9 @@ int ssb_bus_pcibus_register(struct ssb_b
+@@ -830,6 +867,9 @@ int ssb_bus_pcibus_register(struct ssb_b
if (!err) {
ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
"PCI device %s\n", dev_name(&host_pci->dev));
}
return err;
-@@ -838,9 +877,9 @@ EXPORT_SYMBOL(ssb_bus_pcibus_register);
+@@ -838,9 +878,9 @@ EXPORT_SYMBOL(ssb_bus_pcibus_register);
#endif /* CONFIG_SSB_PCIHOST */
#ifdef CONFIG_SSB_PCMCIAHOST
{
int err;
-@@ -860,8 +899,9 @@ EXPORT_SYMBOL(ssb_bus_pcmciabus_register
+@@ -860,8 +900,9 @@ EXPORT_SYMBOL(ssb_bus_pcmciabus_register
#endif /* CONFIG_SSB_PCMCIAHOST */
#ifdef CONFIG_SSB_SDIOHOST
{
int err;
-@@ -881,9 +921,9 @@ int ssb_bus_sdiobus_register(struct ssb_
+@@ -881,9 +922,9 @@ int ssb_bus_sdiobus_register(struct ssb_
EXPORT_SYMBOL(ssb_bus_sdiobus_register);
#endif /* CONFIG_SSB_PCMCIAHOST */
{
int err;
-@@ -964,8 +1004,8 @@ u32 ssb_calc_clock_rate(u32 plltype, u32
+@@ -964,8 +1005,8 @@ u32 ssb_calc_clock_rate(u32 plltype, u32
switch (plltype) {
case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */
if (m & SSB_CHIPCO_CLK_T6_MMASK)
case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
-@@ -1080,23 +1120,22 @@ static u32 ssb_tmslow_reject_bitmask(str
+@@ -1080,23 +1121,22 @@ static u32 ssb_tmslow_reject_bitmask(str
{
u32 rev = ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_SSBREV;
}
int ssb_device_is_enabled(struct ssb_device *dev)
-@@ -1155,10 +1194,10 @@ void ssb_device_enable(struct ssb_device
+@@ -1155,10 +1195,10 @@ void ssb_device_enable(struct ssb_device
}
EXPORT_SYMBOL(ssb_device_enable);
{
int i;
u32 val;
-@@ -1166,7 +1205,7 @@ static int ssb_wait_bit(struct ssb_devic
+@@ -1166,7 +1206,7 @@ static int ssb_wait_bit(struct ssb_devic
for (i = 0; i < timeout; i++) {
val = ssb_read32(dev, reg);
if (set) {
return 0;
} else {
if (!(val & bitmask))
-@@ -1183,20 +1222,38 @@ static int ssb_wait_bit(struct ssb_devic
+@@ -1183,20 +1223,38 @@ static int ssb_wait_bit(struct ssb_devic
void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags)
{
ssb_write32(dev, SSB_TMSLOW,
reject | SSB_TMSLOW_RESET |
-@@ -1211,7 +1268,10 @@ u32 ssb_dma_translation(struct ssb_devic
+@@ -1205,13 +1263,34 @@ void ssb_device_disable(struct ssb_devic
+ }
+ EXPORT_SYMBOL(ssb_device_disable);
+
++/* Some chipsets need routing known for PCIe and 64-bit DMA */
++static bool ssb_dma_translation_special_bit(struct ssb_device *dev)
++{
++ u16 chip_id = dev->bus->chip_id;
++
++ if (dev->id.coreid == SSB_DEV_80211) {
++ return (chip_id == 0x4322 || chip_id == 43221 ||
++ chip_id == 43231 || chip_id == 43222);
++ }
++
++ return 0;
++}
++
+ u32 ssb_dma_translation(struct ssb_device *dev)
+ {
+ switch (dev->bus->bustype) {
case SSB_BUSTYPE_SSB:
return 0;
case SSB_BUSTYPE_PCI:
- return SSB_PCI_DMA;
-+ if (ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_DMA64)
++ if (dev->bus->host_pci->is_pcie &&
++ ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_DMA64) {
+ return SSB_PCIE_DMA_H32;
-+ else
-+ return SSB_PCI_DMA;
++ } else {
++ if (ssb_dma_translation_special_bit(dev))
++ return SSB_PCIE_DMA_H32;
++ else
++ return SSB_PCI_DMA;
++ }
default:
__ssb_dma_not_implemented(dev);
}
-@@ -1328,20 +1388,20 @@ EXPORT_SYMBOL(ssb_bus_may_powerdown);
+@@ -1328,20 +1407,20 @@ EXPORT_SYMBOL(ssb_bus_may_powerdown);
int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl)
{
return 0;
error:
ssb_printk(KERN_ERR PFX "Bus powerup failed\n");
-@@ -1349,6 +1409,37 @@ error:
+@@ -1349,6 +1428,37 @@ error:
}
EXPORT_SYMBOL(ssb_bus_powerup);
u32 base = 0;
--- a/drivers/ssb/pci.c
+++ b/drivers/ssb/pci.c
+@@ -1,7 +1,7 @@
+ /*
+ * Sonics Silicon Backplane PCI-Hostbus related functions.
+ *
+- * Copyright (C) 2005-2006 Michael Buesch <mb@bu3sch.de>
++ * Copyright (C) 2005-2006 Michael Buesch <m@bues.ch>
+ * Copyright (C) 2005 Martin Langer <martin-langer@gmx.de>
+ * Copyright (C) 2005 Stefano Brivio <st3@riseup.net>
+ * Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org>
@@ -17,6 +17,7 @@
#include <linux/ssb/ssb.h>
}
SPEX(ant_available_a, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_A,
SSB_SPROM4_ANTAVAIL_A_SHIFT);
-@@ -470,6 +515,8 @@ static void sprom_extract_r45(struct ssb
+@@ -470,13 +515,21 @@ static void sprom_extract_r45(struct ssb
memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
sizeof(out->antenna_gain.ghz5));
/* TODO - get remaining rev 4 stuff needed */
}
-@@ -560,6 +607,8 @@ static void sprom_extract_r8(struct ssb_
+ static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
+ {
+ int i;
+- u16 v;
++ u16 v, o;
++ u16 pwr_info_offset[] = {
++ SSB_SROM8_PWR_INFO_CORE0, SSB_SROM8_PWR_INFO_CORE1,
++ SSB_SROM8_PWR_INFO_CORE2, SSB_SROM8_PWR_INFO_CORE3
++ };
++ BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) !=
++ ARRAY_SIZE(out->core_pwr_info));
+
+ /* extract the MAC address */
+ for (i = 0; i < 3; i++) {
+@@ -560,6 +613,63 @@ static void sprom_extract_r8(struct ssb_
memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
sizeof(out->antenna_gain.ghz5));
++ /* Extract cores power info info */
++ for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
++ o = pwr_info_offset[i];
++ SPEX(core_pwr_info[i].itssi_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
++ SSB_SPROM8_2G_ITSSI, SSB_SPROM8_2G_ITSSI_SHIFT);
++ SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
++ SSB_SPROM8_2G_MAXP, 0);
++
++ SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SROM8_2G_PA_0, ~0, 0);
++ SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SROM8_2G_PA_1, ~0, 0);
++ SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SROM8_2G_PA_2, ~0, 0);
++
++ SPEX(core_pwr_info[i].itssi_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
++ SSB_SPROM8_5G_ITSSI, SSB_SPROM8_5G_ITSSI_SHIFT);
++ SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
++ SSB_SPROM8_5G_MAXP, 0);
++ SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM8_5GHL_MAXP,
++ SSB_SPROM8_5GH_MAXP, 0);
++ SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM8_5GHL_MAXP,
++ SSB_SPROM8_5GL_MAXP, SSB_SPROM8_5GL_MAXP_SHIFT);
++
++ SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SROM8_5GL_PA_0, ~0, 0);
++ SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SROM8_5GL_PA_1, ~0, 0);
++ SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SROM8_5GL_PA_2, ~0, 0);
++ SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SROM8_5G_PA_0, ~0, 0);
++ SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SROM8_5G_PA_1, ~0, 0);
++ SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SROM8_5G_PA_2, ~0, 0);
++ SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SROM8_5GH_PA_0, ~0, 0);
++ SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SROM8_5GH_PA_1, ~0, 0);
++ SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SROM8_5GH_PA_2, ~0, 0);
++ }
++
++ /* Extract FEM info */
++ SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G,
++ SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
++ SPEX(fem.ghz2.extpa_gain, SSB_SPROM8_FEM2G,
++ SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT);
++ SPEX(fem.ghz2.pdet_range, SSB_SPROM8_FEM2G,
++ SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT);
++ SPEX(fem.ghz2.tr_iso, SSB_SPROM8_FEM2G,
++ SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT);
++ SPEX(fem.ghz2.antswlut, SSB_SPROM8_FEM2G,
++ SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT);
++
++ SPEX(fem.ghz5.tssipos, SSB_SPROM8_FEM5G,
++ SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
++ SPEX(fem.ghz5.extpa_gain, SSB_SPROM8_FEM5G,
++ SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT);
++ SPEX(fem.ghz5.pdet_range, SSB_SPROM8_FEM5G,
++ SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT);
++ SPEX(fem.ghz5.tr_iso, SSB_SPROM8_FEM5G,
++ SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT);
++ SPEX(fem.ghz5.antswlut, SSB_SPROM8_FEM5G,
++ SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT);
++
+ sprom_extract_r458(out, in);
+
/* TODO - get remaining rev 8 stuff needed */
}
-@@ -572,37 +621,34 @@ static int sprom_extract(struct ssb_bus
+@@ -572,37 +682,34 @@ static int sprom_extract(struct ssb_bus
ssb_dprintk(KERN_DEBUG PFX "SPROM revision %d detected.\n", out->revision);
memset(out->et0mac, 0xFF, 6); /* preset et0 and et1 mac */
memset(out->et1mac, 0xFF, 6);
}
if (out->boardflags_lo == 0xFFFF)
-@@ -616,15 +662,14 @@ static int sprom_extract(struct ssb_bus
+@@ -616,15 +723,14 @@ static int sprom_extract(struct ssb_bus
static int ssb_pci_sprom_get(struct ssb_bus *bus,
struct ssb_sprom *sprom)
{
/*
* get SPROM offset: SSB_SPROM_BASE1 except for
* chipcommon rev >= 31 or chip ID is 0x4312 and
-@@ -644,7 +689,7 @@ static int ssb_pci_sprom_get(struct ssb_
+@@ -644,7 +750,7 @@ static int ssb_pci_sprom_get(struct ssb_
buf = kcalloc(SSB_SPROMSIZE_WORDS_R123, sizeof(u16), GFP_KERNEL);
if (!buf)
bus->sprom_size = SSB_SPROMSIZE_WORDS_R123;
sprom_do_read(bus, buf);
err = sprom_check_crc(buf, bus->sprom_size);
-@@ -654,17 +699,24 @@ static int ssb_pci_sprom_get(struct ssb_
+@@ -654,17 +760,24 @@ static int ssb_pci_sprom_get(struct ssb_
buf = kcalloc(SSB_SPROMSIZE_WORDS_R4, sizeof(u16),
GFP_KERNEL);
if (!buf)
err = 0;
goto out_free;
}
-@@ -676,19 +728,15 @@ static int ssb_pci_sprom_get(struct ssb_
+@@ -676,19 +789,15 @@ static int ssb_pci_sprom_get(struct ssb_
out_free:
kfree(buf);
int ssb_pci_get_invariants(struct ssb_bus *bus,
--- a/drivers/ssb/pcihost_wrapper.c
+++ b/drivers/ssb/pcihost_wrapper.c
-@@ -12,6 +12,7 @@
+@@ -6,12 +6,13 @@
+ * Copyright (c) 2005 Stefano Brivio <st3@riseup.net>
+ * Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
+ * Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
+- * Copyright (c) 2005-2007 Michael Buesch <mbuesch@freenet.de>
++ * Copyright (c) 2005-2007 Michael Buesch <m@bues.ch>
+ *
+ * Licensed under the GNU/GPL. See COPYING for details.
*/
#include <linux/pci.h>
driver->remove = ssb_pcihost_remove;
--- a/drivers/ssb/pcmcia.c
+++ b/drivers/ssb/pcmcia.c
+@@ -3,7 +3,7 @@
+ * PCMCIA-Hostbus related functions
+ *
+ * Copyright 2006 Johannes Berg <johannes@sipsolutions.net>
+- * Copyright 2007-2008 Michael Buesch <mb@bu3sch.de>
++ * Copyright 2007-2008 Michael Buesch <m@bues.ch>
+ *
+ * Licensed under the GNU/GPL. See COPYING for details.
+ */
@@ -617,136 +617,140 @@ static int ssb_pcmcia_sprom_check_crc(co
} \
} while (0)
+static int ssb_pcmcia_get_mac(struct pcmcia_device *p_dev,
+ tuple_t *tuple,
+ void *priv)
- {
-- tuple_t tuple;
-- int res;
-- unsigned char buf[32];
++{
+ struct ssb_sprom *sprom = priv;
+
+ if (tuple->TupleData[0] != CISTPL_FUNCE_LAN_NODE_ID)
+static int ssb_pcmcia_do_get_invariants(struct pcmcia_device *p_dev,
+ tuple_t *tuple,
+ void *priv)
-+{
+ {
+- tuple_t tuple;
+- int res;
+- unsigned char buf[32];
+ struct ssb_init_invariants *iv = priv;
struct ssb_sprom *sprom = &iv->sprom;
struct ssb_boardinfo *bi = &iv->boardinfo;
--- a/drivers/ssb/scan.c
+++ b/drivers/ssb/scan.c
+@@ -2,7 +2,7 @@
+ * Sonics Silicon Backplane
+ * Bus scanning
+ *
+- * Copyright (C) 2005-2007 Michael Buesch <mb@bu3sch.de>
++ * Copyright (C) 2005-2007 Michael Buesch <m@bues.ch>
+ * Copyright (C) 2005 Martin Langer <martin-langer@gmx.de>
+ * Copyright (C) 2005 Stefano Brivio <st3@riseup.net>
+ * Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org>
@@ -260,7 +260,10 @@ static int we_support_multiple_80211_cor
#ifdef CONFIG_SSB_PCIHOST
if (bus->bustype == SSB_BUSTYPE_PCI) {
}
--- a/drivers/ssb/sprom.c
+++ b/drivers/ssb/sprom.c
+@@ -2,7 +2,7 @@
+ * Sonics Silicon Backplane
+ * Common SPROM support routines
+ *
+- * Copyright (C) 2005-2008 Michael Buesch <mb@bu3sch.de>
++ * Copyright (C) 2005-2008 Michael Buesch <m@bues.ch>
+ * Copyright (C) 2005 Martin Langer <martin-langer@gmx.de>
+ * Copyright (C) 2005 Stefano Brivio <st3@riseup.net>
+ * Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org>
@@ -14,9 +14,10 @@
#include "ssb_private.h"
/**
- * ssb_arch_set_fallback_sprom - Set a fallback SPROM for use if no SPROM is found.
+- *
+- * @sprom: The SPROM data structure to register.
+ * ssb_arch_register_fallback_sprom - Registers a method providing a
+ * fallback SPROM if no SPROM is found.
*
-- * @sprom: The SPROM data structure to register.
-+ * @sprom_callback: The callback function.
- *
- * With this function the architecture implementation may register a fallback
- * SPROM data structure. The fallback is only used for PCI based SSB devices,
- * where no valid SPROM can be found in the shadow registers.
++ * @sprom_callback: The callback function.
+ *
+- * This function is useful for weird architectures that have a half-assed SSB device
+- * hardwired to their PCI bus.
+ * With this function the architecture implementation may register a
+ * callback handler which fills the SPROM data structure. The fallback is
+ * only used for PCI based SSB devices, where no valid SPROM can be found
+ * in the shadow registers.
- *
-- * This function is useful for weird architectures that have a half-assed SSB device
-- * hardwired to their PCI bus.
++ *
+ * This function is useful for weird architectures that have a half-assed
+ * SSB device hardwired to their PCI bus.
- *
-- * Note that it does only work with PCI attached SSB devices. PCMCIA devices currently
-- * don't use this fallback.
-- * Architectures must provide the SPROM for native SSB devices anyway,
-- * so the fallback also isn't used for native devices.
++ *
+ * Note that it does only work with PCI attached SSB devices. PCMCIA
+ * devices currently don't use this fallback.
+ * Architectures must provide the SPROM for native SSB devices anyway, so
+ * the fallback also isn't used for native devices.
*
+- * Note that it does only work with PCI attached SSB devices. PCMCIA devices currently
+- * don't use this fallback.
+- * Architectures must provide the SPROM for native SSB devices anyway,
+- * so the fallback also isn't used for native devices.
+- *
- * This function is available for architecture code, only. So it is not exported.
+ * This function is available for architecture code, only. So it is not
+ * exported.
#endif /* LINUX_SSB_PRIVATE_H_ */
--- a/include/linux/ssb/ssb.h
+++ b/include/linux/ssb/ssb.h
-@@ -27,6 +27,8 @@ struct ssb_sprom {
+@@ -16,6 +16,12 @@ struct pcmcia_device;
+ struct ssb_bus;
+ struct ssb_driver;
+
++struct ssb_sprom_core_pwr_info {
++ u8 itssi_2g, itssi_5g;
++ u8 maxpwr_2g, maxpwr_5gl, maxpwr_5g, maxpwr_5gh;
++ u16 pa_2g[3], pa_5gl[3], pa_5g[3], pa_5gh[3];
++};
++
+ struct ssb_sprom {
+ u8 revision;
+ u8 il0mac[6]; /* MAC address for 802.11b/g */
+@@ -25,8 +31,10 @@ struct ssb_sprom {
+ u8 et1phyaddr; /* MII address for enet1 */
+ u8 et0mdcport; /* MDIO for enet0 */
u8 et1mdcport; /* MDIO for enet1 */
- u8 board_rev; /* Board revision number from SPROM. */
+- u8 board_rev; /* Board revision number from SPROM. */
++ u16 board_rev; /* Board revision number from SPROM. */
u8 country_code; /* Country Code */
+ u16 leddc_on_time; /* LED Powersave Duty Cycle On Count */
+ u16 leddc_off_time; /* LED Powersave Duty Cycle Off Count */
u8 ant_available_a; /* 2GHz antenna available bits (up to 4) */
u8 ant_available_bg; /* 5GHz antenna available bits (up to 4) */
u16 pa0b0;
-@@ -55,6 +57,10 @@ struct ssb_sprom {
+@@ -55,6 +63,10 @@ struct ssb_sprom {
u8 tri5gl; /* 5.2GHz TX isolation */
u8 tri5g; /* 5.3GHz TX isolation */
u8 tri5gh; /* 5.8GHz TX isolation */
u8 rxpo2g; /* 2GHz RX power offset */
u8 rxpo5g; /* 5GHz RX power offset */
u8 rssisav2g; /* 2GHz RSSI params */
-@@ -95,7 +101,7 @@ struct ssb_sprom {
+@@ -76,6 +88,8 @@ struct ssb_sprom {
+ u16 boardflags2_hi; /* Board flags (bits 48-63) */
+ /* TODO store board flags in a single u64 */
+
++ struct ssb_sprom_core_pwr_info core_pwr_info[4];
++
+ /* Antenna gain values for up to 4 antennas
+ * on each band. Values in dBm/4 (Q5.2). Negative gain means the
+ * loss in the connectors is bigger than the gain. */
+@@ -88,6 +102,15 @@ struct ssb_sprom {
+ } ghz5; /* 5GHz band */
+ } antenna_gain;
+
++ struct {
++ struct {
++ u8 tssipos, extpa_gain, pdet_range, tr_iso, antswlut;
++ } ghz2;
++ struct {
++ u8 tssipos, extpa_gain, pdet_range, tr_iso, antswlut;
++ } ghz5;
++ } fem;
++
+ /* TODO - add any parameters needed from rev 2, 3, 4, 5 or 8 SPROMs */
+ };
+
+@@ -95,7 +118,7 @@ struct ssb_sprom {
struct ssb_boardinfo {
u16 vendor;
u16 type;
};
-@@ -167,7 +173,7 @@ struct ssb_device {
+@@ -167,7 +190,7 @@ struct ssb_device {
* is an optimization. */
const struct ssb_bus_ops *ops;
struct ssb_bus *bus;
struct ssb_device_id id;
-@@ -269,7 +275,8 @@ struct ssb_bus {
+@@ -225,10 +248,9 @@ struct ssb_driver {
+ #define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv)
+
+ extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner);
+-static inline int ssb_driver_register(struct ssb_driver *drv)
+-{
+- return __ssb_driver_register(drv, THIS_MODULE);
+-}
++#define ssb_driver_register(drv) \
++ __ssb_driver_register(drv, THIS_MODULE)
++
+ extern void ssb_driver_unregister(struct ssb_driver *drv);
+
+
+@@ -269,7 +291,8 @@ struct ssb_bus {
const struct ssb_bus_ops *ops;
struct ssb_device *mapped_device;
union {
/* Currently mapped PCMCIA segment. (bustype == SSB_BUSTYPE_PCMCIA only) */
-@@ -281,14 +288,17 @@ struct ssb_bus {
+@@ -281,14 +304,17 @@ struct ssb_bus {
* On PCMCIA-host busses this is used to protect the whole MMIO access. */
spinlock_t bar_lock;
/* See enum ssb_quirks */
unsigned int quirks;
-@@ -300,7 +310,7 @@ struct ssb_bus {
+@@ -300,7 +326,7 @@ struct ssb_bus {
/* ID information about the Chip. */
u16 chip_id;
u16 sprom_offset;
u16 sprom_size; /* number of words in sprom */
u8 chip_package;
-@@ -396,7 +406,9 @@ extern bool ssb_is_sprom_available(struc
+@@ -396,7 +422,9 @@ extern bool ssb_is_sprom_available(struc
/* Set a fallback SPROM.
* See kdoc at the function definition for complete documentation. */
/* Suspend a SSB bus.
* Call this from the parent bus suspend routine. */
-@@ -667,6 +679,7 @@ extern int ssb_bus_may_powerdown(struct
+@@ -667,6 +695,7 @@ extern int ssb_bus_may_powerdown(struct
* Otherwise static always-on powercontrol will be used. */
extern int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl);
#define SSB_SPROM8_RSSISMF5G 0x000F
#define SSB_SPROM8_RSSISMC5G 0x00F0
#define SSB_SPROM8_RSSISMC5G_SHIFT 4
-@@ -374,47 +420,47 @@
+@@ -374,47 +420,138 @@
#define SSB_SPROM8_RSSISAV5G_SHIFT 8
#define SSB_SPROM8_BXA5G 0x1800
#define SSB_SPROM8_BXA5G_SHIFT 11
#define SSB_SPROM8_RXPO5G 0xFF00 /* 5GHz RX power offset */
#define SSB_SPROM8_RXPO5G_SHIFT 8
-#define SSB_SPROM8_MAXP_BG 0x10C0 /* Max Power 2GHz in path 1 */
++#define SSB_SPROM8_FEM2G 0x00AE
++#define SSB_SPROM8_FEM5G 0x00B0
++#define SSB_SROM8_FEM_TSSIPOS 0x0001
++#define SSB_SROM8_FEM_TSSIPOS_SHIFT 0
++#define SSB_SROM8_FEM_EXTPA_GAIN 0x0006
++#define SSB_SROM8_FEM_EXTPA_GAIN_SHIFT 1
++#define SSB_SROM8_FEM_PDET_RANGE 0x00F8
++#define SSB_SROM8_FEM_PDET_RANGE_SHIFT 3
++#define SSB_SROM8_FEM_TR_ISO 0x0700
++#define SSB_SROM8_FEM_TR_ISO_SHIFT 8
++#define SSB_SROM8_FEM_ANTSWLUT 0xF800
++#define SSB_SROM8_FEM_ANTSWLUT_SHIFT 11
++#define SSB_SPROM8_THERMAL 0x00B2
++#define SSB_SPROM8_MPWR_RAWTS 0x00B4
++#define SSB_SPROM8_TS_SLP_OPT_CORRX 0x00B6
++#define SSB_SPROM8_FOC_HWIQ_IQSWP 0x00B8
++#define SSB_SPROM8_PHYCAL_TEMPDELTA 0x00BA
++
++/* There are 4 blocks with power info sharing the same layout */
++#define SSB_SROM8_PWR_INFO_CORE0 0x00C0
++#define SSB_SROM8_PWR_INFO_CORE1 0x00E0
++#define SSB_SROM8_PWR_INFO_CORE2 0x0100
++#define SSB_SROM8_PWR_INFO_CORE3 0x0120
++
++#define SSB_SROM8_2G_MAXP_ITSSI 0x00
++#define SSB_SPROM8_2G_MAXP 0x00FF
++#define SSB_SPROM8_2G_ITSSI 0xFF00
++#define SSB_SPROM8_2G_ITSSI_SHIFT 8
++#define SSB_SROM8_2G_PA_0 0x02 /* 2GHz power amp settings */
++#define SSB_SROM8_2G_PA_1 0x04
++#define SSB_SROM8_2G_PA_2 0x06
++#define SSB_SROM8_5G_MAXP_ITSSI 0x08 /* 5GHz ITSSI and 5.3GHz Max Power */
++#define SSB_SPROM8_5G_MAXP 0x00FF
++#define SSB_SPROM8_5G_ITSSI 0xFF00
++#define SSB_SPROM8_5G_ITSSI_SHIFT 8
++#define SSB_SPROM8_5GHL_MAXP 0x0A /* 5.2GHz and 5.8GHz Max Power */
++#define SSB_SPROM8_5GH_MAXP 0x00FF
++#define SSB_SPROM8_5GL_MAXP 0xFF00
++#define SSB_SPROM8_5GL_MAXP_SHIFT 8
++#define SSB_SROM8_5G_PA_0 0x0C /* 5.3GHz power amp settings */
++#define SSB_SROM8_5G_PA_1 0x0E
++#define SSB_SROM8_5G_PA_2 0x10
++#define SSB_SROM8_5GL_PA_0 0x12 /* 5.2GHz power amp settings */
++#define SSB_SROM8_5GL_PA_1 0x14
++#define SSB_SROM8_5GL_PA_2 0x16
++#define SSB_SROM8_5GH_PA_0 0x18 /* 5.8GHz power amp settings */
++#define SSB_SROM8_5GH_PA_1 0x1A
++#define SSB_SROM8_5GH_PA_2 0x1C
++
++/* TODO: Make it deprecated */
+#define SSB_SPROM8_MAXP_BG 0x00C0 /* Max Power 2GHz in path 1 */
#define SSB_SPROM8_MAXP_BG_MASK 0x00FF /* Mask for Max Power 2GHz */
#define SSB_SPROM8_ITSSI_BG 0xFF00 /* Mask for path 1 itssi_bg */
+#define SSB_SPROM8_PA1HIB0 0x00D8 /* 5.8GHz power amp settings */
+#define SSB_SPROM8_PA1HIB1 0x00DA
+#define SSB_SPROM8_PA1HIB2 0x00DC
++
+#define SSB_SPROM8_CCK2GPO 0x0140 /* CCK power offset */
+#define SSB_SPROM8_OFDM2GPO 0x0142 /* 2.4GHz OFDM power offset */
+#define SSB_SPROM8_OFDM5GPO 0x0146 /* 5.3GHz OFDM power offset */
+#define SSB_SPROM8_OFDM5GLPO 0x014A /* 5.2GHz OFDM power offset */
+#define SSB_SPROM8_OFDM5GHPO 0x014E /* 5.8GHz OFDM power offset */
++
++/* Values for boardflags_lo read from SPROM */
++#define SSB_BFL_BTCOEXIST 0x0001 /* implements Bluetooth coexistance */
++#define SSB_BFL_PACTRL 0x0002 /* GPIO 9 controlling the PA */
++#define SSB_BFL_AIRLINEMODE 0x0004 /* implements GPIO 13 radio disable indication */
++#define SSB_BFL_RSSI 0x0008 /* software calculates nrssi slope. */
++#define SSB_BFL_ENETSPI 0x0010 /* has ephy roboswitch spi */
++#define SSB_BFL_XTAL_NOSLOW 0x0020 /* no slow clock available */
++#define SSB_BFL_CCKHIPWR 0x0040 /* can do high power CCK transmission */
++#define SSB_BFL_ENETADM 0x0080 /* has ADMtek switch */
++#define SSB_BFL_ENETVLAN 0x0100 /* can do vlan */
++#define SSB_BFL_AFTERBURNER 0x0200 /* supports Afterburner mode */
++#define SSB_BFL_NOPCI 0x0400 /* board leaves PCI floating */
++#define SSB_BFL_FEM 0x0800 /* supports the Front End Module */
++#define SSB_BFL_EXTLNA 0x1000 /* has an external LNA */
++#define SSB_BFL_HGPA 0x2000 /* had high gain PA */
++#define SSB_BFL_BTCMOD 0x4000 /* BFL_BTCOEXIST is given in alternate GPIOs */
++#define SSB_BFL_ALTIQ 0x8000 /* alternate I/Q settings */
++
++/* Values for boardflags_hi read from SPROM */
++#define SSB_BFH_NOPA 0x0001 /* has no PA */
++#define SSB_BFH_RSSIINV 0x0002 /* RSSI uses positive slope (not TSSI) */
++#define SSB_BFH_PAREF 0x0004 /* uses the PARef LDO */
++#define SSB_BFH_3TSWITCH 0x0008 /* uses a triple throw switch shared with bluetooth */
++#define SSB_BFH_PHASESHIFT 0x0010 /* can support phase shifter */
++#define SSB_BFH_BUCKBOOST 0x0020 /* has buck/booster */
++#define SSB_BFH_FEM_BT 0x0040 /* has FEM and switch to share antenna with bluetooth */
++
++/* Values for boardflags2_lo read from SPROM */
++#define SSB_BFL2_RXBB_INT_REG_DIS 0x0001 /* external RX BB regulator present */
++#define SSB_BFL2_APLL_WAR 0x0002 /* alternative A-band PLL settings implemented */
++#define SSB_BFL2_TXPWRCTRL_EN 0x0004 /* permits enabling TX Power Control */
++#define SSB_BFL2_2X4_DIV 0x0008 /* 2x4 diversity switch */
++#define SSB_BFL2_5G_PWRGAIN 0x0010 /* supports 5G band power gain */
++#define SSB_BFL2_PCIEWAR_OVR 0x0020 /* overrides ASPM and Clkreq settings */
++#define SSB_BFL2_CAESERS_BRD 0x0040 /* is Caesers board (unused) */
++#define SSB_BFL2_BTC3WIRE 0x0080 /* used 3-wire bluetooth coexist */
++#define SSB_BFL2_SKWRKFEM_BRD 0x0100 /* 4321mcm93 uses Skyworks FEM */
++#define SSB_BFL2_SPUR_WAR 0x0200 /* has a workaround for clock-harmonic spurs */
++#define SSB_BFL2_GPLL_WAR 0x0400 /* altenative G-band PLL settings implemented */
/* Values for SSB_SPROM1_BINF_CCODE */
enum {
--- a/include/linux/ssb/ssb_driver_chipcommon.h
+++ b/include/linux/ssb/ssb_driver_chipcommon.h
+@@ -8,7 +8,7 @@
+ * gpio interface, extbus, and support for serial and parallel flashes.
+ *
+ * Copyright 2005, Broadcom Corporation
+- * Copyright 2006, Michael Buesch <mb@bu3sch.de>
++ * Copyright 2006, Michael Buesch <m@bues.ch>
+ *
+ * Licensed under the GPL version 2. See COPYING for details.
+ */
@@ -123,6 +123,8 @@
#define SSB_CHIPCO_FLASHDATA 0x0048
#define SSB_CHIPCO_BCAST_ADDR 0x0050
#define SSB_CHIPCO_HW_WORKAROUND 0x01E4 /* Hardware workaround (rev >= 20) */
#define SSB_CHIPCO_UART0_DATA 0x0300
#define SSB_CHIPCO_UART0_IMR 0x0304
+--- a/drivers/ssb/b43_pci_bridge.c
++++ b/drivers/ssb/b43_pci_bridge.c
+@@ -5,12 +5,13 @@
+ * because of its small size we include it in the SSB core
+ * instead of creating a standalone module.
+ *
+- * Copyright 2007 Michael Buesch <mb@bu3sch.de>
++ * Copyright 2007 Michael Buesch <m@bues.ch>
+ *
+ * Licensed under the GNU/GPL. See COPYING for details.
+ */
+
+ #include <linux/pci.h>
++#include <linux/module.h>
+ #include <linux/ssb/ssb.h>
+
+ #include "ssb_private.h"
+--- a/drivers/ssb/driver_extif.c
++++ b/drivers/ssb/driver_extif.c
+@@ -3,7 +3,7 @@
+ * Broadcom EXTIF core driver
+ *
+ * Copyright 2005, Broadcom Corporation
+- * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
++ * Copyright 2006, 2007, Michael Buesch <m@bues.ch>
+ * Copyright 2006, 2007, Felix Fietkau <nbd@openwrt.org>
+ * Copyright 2007, Aurelien Jarno <aurelien@aurel32.net>
+ *
+--- a/drivers/ssb/embedded.c
++++ b/drivers/ssb/embedded.c
+@@ -3,7 +3,7 @@
+ * Embedded systems support code
+ *
+ * Copyright 2005-2008, Broadcom Corporation
+- * Copyright 2006-2008, Michael Buesch <mb@bu3sch.de>
++ * Copyright 2006-2008, Michael Buesch <m@bues.ch>
+ *
+ * Licensed under the GNU/GPL. See COPYING for details.
+ */
+--- a/drivers/ssb/sdio.c
++++ b/drivers/ssb/sdio.c
+@@ -6,7 +6,7 @@
+ *
+ * Based on drivers/ssb/pcmcia.c
+ * Copyright 2006 Johannes Berg <johannes@sipsolutions.net>
+- * Copyright 2007-2008 Michael Buesch <mb@bu3sch.de>
++ * Copyright 2007-2008 Michael Buesch <m@bues.ch>
+ *
+ * Licensed under the GNU/GPL. See COPYING for details.
+ *
projects / openwrt.git / blobdiff