Add support for the D-Link DWL-3150

[openwrt.git] / package / broadcom-diag / src / gpio.h

diff --git a/package/broadcom-diag/src/gpio.h b/package/broadcom-diag/src/gpio.h
index c6f34bd..6d83039 100644 (file)
--- a/package/broadcom-diag/src/gpio.h
+++ b/package/broadcom-diag/src/gpio.h
@@ -1,5 +1,80 @@
 #ifndef __DIAG_GPIO_H
 #define __DIAG_GPIO_H
+#include <linux/interrupt.h>
+
+#ifndef BCMDRIVER
+#include <linux/ssb/ssb.h>
+#include <linux/ssb/ssb_driver_chipcommon.h>
+#include <linux/ssb/ssb_driver_extif.h>
+
+extern struct ssb_bus ssb;
+
+#define gpio_op(op, param...) \
+       do { \
+               if (ssb.chipco.dev) \
+                       return ssb_chipco_gpio_##op(&ssb.chipco, param); \
+               else if (ssb.extif.dev) \
+                       return ssb_extif_gpio_##op(&ssb.extif, param); \
+               else \
+                       return 0; \
+       } while (0);
+               
+
+static inline u32 gpio_in(void)
+{
+       gpio_op(in, ~0);
+}
+
+static inline u32 gpio_out(u32 mask, u32 value)
+{
+       gpio_op(out, mask, value);
+}
+
+static inline u32 gpio_outen(u32 mask, u32 value)
+{
+       gpio_op(outen, mask, value);
+}
+
+static inline u32 gpio_control(u32 mask, u32 value)
+{
+       if (ssb.chipco.dev)
+               return ssb_chipco_gpio_control(&ssb.chipco, mask, value);
+       else
+               return 0;
+}
+
+static inline u32 gpio_intmask(u32 mask, u32 value)
+{
+       gpio_op(intmask, mask, value);
+}
+
+static inline u32 gpio_intpolarity(u32 mask, u32 value)
+{
+       gpio_op(polarity, mask, value);
+}
+
+static void gpio_set_irqenable(int enabled, irqreturn_t (*handler)(int, void *))
+{
+       int irq;
+
+       if (ssb.chipco.dev)
+               irq = ssb_mips_irq(ssb.chipco.dev) + 2;
+       else if (ssb.extif.dev)
+               irq = ssb_mips_irq(ssb.extif.dev) + 2;
+       else return;
+       
+       if (enabled) {
+               if (request_irq(irq, handler, IRQF_SHARED | IRQF_SAMPLE_RANDOM, "gpio", handler))
+                       return;
+       } else {
+               free_irq(irq, handler);
+       }
+
+       if (ssb.chipco.dev)
+               ssb_write32_masked(ssb.chipco.dev, SSB_CHIPCO_IRQMASK, SSB_CHIPCO_IRQ_GPIO, (enabled ? SSB_CHIPCO_IRQ_GPIO : 0));
+}
+
+#else
 
 #include <typedefs.h>
 #include <osl.h>
@@ -18,13 +93,6 @@
 #define sbh_lock bcm947xx_sbh_lock
 #endif
 
-#define EXTIF_ADDR 0x1f000000
-#define EXTIF_UART (EXTIF_ADDR + 0x00800000)
-
-#define GPIO_TYPE_NORMAL       (0x0 << 24)
-#define GPIO_TYPE_EXTIF        (0x1 << 24)
-#define GPIO_TYPE_MASK         (0xf << 24)
-
 extern void *sbh;
 extern spinlock_t sbh_lock;
 
@@ -65,6 +133,15 @@ static void gpio_set_irqenable(int enabled, irqreturn_t (*handler)(int, void *,
        spin_unlock_irqrestore(sbh_lock, flags);
 }
 
+#endif /* BCMDRIVER */
+
+#define EXTIF_ADDR 0x1f000000
+#define EXTIF_UART (EXTIF_ADDR + 0x00800000)
+
+#define GPIO_TYPE_NORMAL       (0x0 << 24)
+#define GPIO_TYPE_EXTIF        (0x1 << 24)
+#define GPIO_TYPE_MASK         (0xf << 24)
+
 static inline void gpio_set_extif(int gpio, int value)
 {
        volatile u8 *addr = (volatile u8 *) KSEG1ADDR(EXTIF_UART) + (gpio & ~GPIO_TYPE_MASK);
@@ -74,5 +151,4 @@ static inline void gpio_set_extif(int gpio, int value)
                *addr;
 }
 
-
-#endif
+#endif /* __DIAG_GPIO_H */