return the correct system type for Aruba

[openwrt.git] / target / linux / aruba-2.6 / patches / 002-irq.patch

diff --git a/target/linux/aruba-2.6/patches/002-irq.patch b/target/linux/aruba-2.6/patches/002-irq.patch
index 308c399..8faffaf 100644 (file)
--- a/target/linux/aruba-2.6/patches/002-irq.patch
+++ b/target/linux/aruba-2.6/patches/002-irq.patch
@@ -92,11 +92,12 @@ diff -Nur linux-2.6.15/arch/mips/aruba/idtIRQ.S linux-2.6.15-openwrt/arch/mips/a
 diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/aruba/irq.c
 --- linux-2.6.15/arch/mips/aruba/irq.c 1970-01-01 01:00:00.000000000 +0100
 +++ linux-2.6.15-openwrt/arch/mips/aruba/irq.c 2006-01-10 00:32:32.000000000 +0100
 diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/aruba/irq.c
 --- linux-2.6.15/arch/mips/aruba/irq.c 1970-01-01 01:00:00.000000000 +0100
 +++ linux-2.6.15-openwrt/arch/mips/aruba/irq.c 2006-01-10 00:32:32.000000000 +0100

-@@ -0,0 +1,424 @@
+@@ -0,0 +1,429 @@

 +/**************************************************************************
 + *
 + *  BRIEF MODULE DESCRIPTION
 +/**************************************************************************
 + *
 + *  BRIEF MODULE DESCRIPTION

-+ *     Interrupt routines for IDT EB434 boards
++ *     Interrupt routines for IDT EB434 boards / Atheros boards
++ *     Modified by Aruba Networks

 + *
 + *  Copyright 2004 IDT Inc. (rischelp@idt.com)
 + *         
 + *
 + *  Copyright 2004 IDT Inc. (rischelp@idt.com)
 + *         


@@ -182,8 +183,8 @@ diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/arub
 +};
 +
 +#define READ_PEND_MERLOT(base) (*((volatile unsigned long *)(0xbc003010)))
 +};
 +
 +#define READ_PEND_MERLOT(base) (*((volatile unsigned long *)(0xbc003010)))

-+#define READ_MASK_MERLOT(base) (*((volatile unsigned long *)(0xbc003010 + 4)))
-+#define WRITE_MASK_MERLOT(base, val) ((*((volatile unsigned long *)((0xbc003010) + 4))) = (val))
++#define READ_MASK_MERLOT(base) (*((volatile unsigned long *)(0xbc003014)))
++#define WRITE_MASK_MERLOT(base, val) ((*((volatile unsigned long *)(0xbc003014))) = (val), READ_MASK_MERLOT())

 +
 +static const intr_group_t intr_group_muscat[NUM_INTR_GROUPS] = {
 +      {0x0000efff, (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 0 * IC_GROUP_OFFSET)},
 +
 +static const intr_group_t intr_group_muscat[NUM_INTR_GROUPS] = {
 +      {0x0000efff, (u32 *) KSEG1ADDR(IC_GROUP0_PEND + 0 * IC_GROUP_OFFSET)},


@@ -223,21 +224,14 @@ diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/arub
 +
 +static inline void enable_local_irq(unsigned int ip)
 +{
 +
 +static inline void enable_local_irq(unsigned int ip)
 +{

-+      int ipnum = 0x100 << ip;
-+      clear_c0_cause(ipnum);
-+      set_c0_status(ipnum);
++      set_c0_status(0x100 << ip);
++      irq_enable_hazard();

 +}
 +
 +static inline void disable_local_irq(unsigned int ip)
 +{
 +}
 +
 +static inline void disable_local_irq(unsigned int ip)
 +{

-+      int ipnum = 0x100 << ip;
-+      clear_c0_status(ipnum);
-+}
-+
-+static inline void ack_local_irq(unsigned int ip)
-+{
-+      int ipnum = 0x100 << ip;
-+      clear_c0_cause(ipnum);
++      clear_c0_status(0x100 << ip);
++      irq_disable_hazard();

 +}
 +
 +static void aruba_enable_irq(unsigned int irq_nr)
 +}
 +
 +static void aruba_enable_irq(unsigned int irq_nr)


@@ -269,13 +263,9 @@ diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/arub
 +              ip -= (group << 5);
 +              intr_bit = 1 << ip;
 +
 +              ip -= (group << 5);
 +              intr_bit = 1 << ip;
 +

-+              // first enable the IP mapped to this IRQ
-+              enable_local_irq(group_to_ip(group));
-+

 +              switch (mips_machtype) {
 +                      case MACH_ARUBA_AP70:
 +                              addr = intr_group_muscat[group].base_addr;
 +              switch (mips_machtype) {
 +                      case MACH_ARUBA_AP70:
 +                              addr = intr_group_muscat[group].base_addr;

-+                              // unmask intr within group

 +                              WRITE_MASK_MUSCAT(addr, READ_MASK_MUSCAT(addr) & ~intr_bit);
 +                              break;
 +                      case MACH_ARUBA_AP65:
 +                              WRITE_MASK_MUSCAT(addr, READ_MASK_MUSCAT(addr) & ~intr_bit);
 +                              break;
 +                      case MACH_ARUBA_AP65:


@@ -285,8 +275,10 @@ diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/arub
 +                              WRITE_MASK_MERLOT(addr, READ_MASK_MERLOT(addr) | intr_bit);
 +                              break;
 +              }
 +                              WRITE_MASK_MERLOT(addr, READ_MASK_MERLOT(addr) | intr_bit);
 +                              break;
 +              }

++              enable_local_irq(group_to_ip(group));

 +      }
 +
 +      }
 +

++      back_to_back_c0_hazard();

 +      local_irq_restore(flags);
 +
 +}
 +      local_irq_restore(flags);
 +
 +}


@@ -341,15 +333,15 @@ diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/arub
 +                              // mask intr within group
 +                              mask = READ_MASK_MERLOT(addr);
 +                              mask &= ~intr_bit;
 +                              // mask intr within group
 +                              mask = READ_MASK_MERLOT(addr);
 +                              mask &= ~intr_bit;

-+                              WRITE_MASK_MERLOT(addr, mask);

 +                              if (!mask)
 +                                      disable_local_irq(group_to_ip(group));
 +                              if (!mask)
 +                                      disable_local_irq(group_to_ip(group));

++                              WRITE_MASK_MERLOT(addr, mask);

 +                              break;
 +              }
 +      }
 +
 +                              break;
 +              }
 +      }
 +

++      back_to_back_c0_hazard();

 +      local_irq_restore(flags);
 +      local_irq_restore(flags);

-+

 +}
 +
 +static unsigned int startup_irq(unsigned int irq_nr)
 +}
 +
 +static unsigned int startup_irq(unsigned int irq_nr)


@@ -361,29 +353,29 @@ diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/arub
 +static void shutdown_irq(unsigned int irq_nr)
 +{
 +      aruba_disable_irq(irq_nr);
 +static void shutdown_irq(unsigned int irq_nr)
 +{
 +      aruba_disable_irq(irq_nr);

-+      return;

 +}
 +
 +static void mask_and_ack_irq(unsigned int irq_nr)
 +{
 +      aruba_disable_irq(irq_nr);
 +}
 +
 +static void mask_and_ack_irq(unsigned int irq_nr)
 +{
 +      aruba_disable_irq(irq_nr);

-+      ack_local_irq(group_to_ip(irq_to_group(irq_nr)));

 +}
 +
 +static void end_irq(unsigned int irq_nr)
 +{
 +
 +}
 +
 +static void end_irq(unsigned int irq_nr)
 +{
 +

-+      unsigned long flags;

 +      int ip = irq_nr - GROUP0_IRQ_BASE;
 +      unsigned int intr_bit, group;
 +      volatile unsigned int *addr;
 +
 +
 +      int ip = irq_nr - GROUP0_IRQ_BASE;
 +      unsigned int intr_bit, group;
 +      volatile unsigned int *addr;
 +
 +

-+      local_irq_save(flags);

 +      if (irq_desc[irq_nr].status & (IRQ_DISABLED | IRQ_INPROGRESS)) {
 +      if (irq_desc[irq_nr].status & (IRQ_DISABLED | IRQ_INPROGRESS)) {

-+              printk("warning: end_irq %d did not enable (%x) (ignoring)\n",
++              printk("warning: end_irq %d did not enable (%x)\n",

 +                     irq_nr, irq_desc[irq_nr].status);
 +                     irq_nr, irq_desc[irq_nr].status);

-+      }
++              /* fall through; enable the interrupt
++               * -- It'll get stuck otherwise
++               */
++
++      } 

 +
 +      if (ip<0) {
 +              enable_local_irq(irq_nr);
 +
 +      if (ip<0) {
 +              enable_local_irq(irq_nr);


@@ -411,7 +403,8 @@ diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/arub
 +                              break;
 +
 +                      case MACH_ARUBA_AP65:
 +                              break;
 +
 +                      case MACH_ARUBA_AP65:

-+                              case MACH_ARUBA_AP60:
++                      case MACH_ARUBA_AP60:
++                      default:

 +                              group = 0;
 +      
 +                              // calc interrupt bit within group
 +                              group = 0;
 +      
 +                              // calc interrupt bit within group


@@ -426,11 +419,10 @@ diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/arub
 +                              break;
 +              }
 +      }
 +                              break;
 +              }
 +      }

-+      local_irq_restore(flags);

 +}
 +
 +static struct hw_interrupt_type aruba_irq_type = {
 +}
 +
 +static struct hw_interrupt_type aruba_irq_type = {

-+      .typename = "IDT434",
++      .typename = "ARUBA",

 +      .startup = startup_irq,
 +      .shutdown = shutdown_irq,
 +      .enable = aruba_enable_irq,
 +      .startup = startup_irq,
 +      .shutdown = shutdown_irq,
 +      .enable = aruba_enable_irq,


@@ -446,7 +438,6 @@ diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/arub
 +      memset(irq_desc, 0, sizeof(irq_desc));
 +      set_except_vector(0, idtIRQ);
 +
 +      memset(irq_desc, 0, sizeof(irq_desc));
 +      set_except_vector(0, idtIRQ);
 +

-+

 +      set_c0_status(0xFF00);
 +
 +      for (i = 0; i < RC32434_NR_IRQS; i++) {
 +      set_c0_status(0xFF00);
 +
 +      for (i = 0; i < RC32434_NR_IRQS; i++) {


@@ -456,17 +447,6 @@ diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/arub
 +              irq_desc[i].handler = &aruba_irq_type;
 +              spin_lock_init(&irq_desc[i].lock);
 +      }
 +              irq_desc[i].handler = &aruba_irq_type;
 +              spin_lock_init(&irq_desc[i].lock);
 +      }

-+
-+      switch (mips_machtype) {
-+              case MACH_ARUBA_AP70:
-+                      break;
-+              case MACH_ARUBA_AP65:
-+              case MACH_ARUBA_AP60:
-+              default:
-+                      WRITE_MASK_MERLOT(intr_group_merlot[0].base_addr, 0);
-+                      *((volatile unsigned long *)0xbc003014) = 0x10;
-+                      break;
-+      }

 +}
 +
 +/* Main Interrupt dispatcher */
 +}
 +
 +/* Main Interrupt dispatcher */


@@ -474,6 +454,24 @@ diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/arub
 +{
 +      unsigned int pend, group, ip;
 +      volatile unsigned int *addr;
 +{
 +      unsigned int pend, group, ip;
 +      volatile unsigned int *addr;

++
++      if(cp0_cause == 0) {
++              printk("INTERRUPT(S) FIRED WHILE MASKED\n");
++#ifdef ARUBA_DEBUG
++              // debuging use -- figure out which interrupt(s) fired
++              cp0_cause = read_c0_cause() & CAUSEF_IP;
++              while (cp0_cause) {
++                      unsigned long intr_bit;
++                      unsigned int irq_nr;
++                      intr_bit = (31 - rc32434_clz(cp0_cause));
++                      irq_nr = intr_bit - GROUP0_IRQ_BASE;
++                      printk(" ---> MASKED IRQ %d\n",irq_nr);
++                      cp0_cause &= ~(1 << intr_bit);
++              }
++#endif
++              return;
++      }
++

 +      switch (mips_machtype) {
 +              case MACH_ARUBA_AP70:
 +                      if ((ip = (cp0_cause & 0x7c00))) {
 +      switch (mips_machtype) {
 +              case MACH_ARUBA_AP70:
 +                      if ((ip = (cp0_cause & 0x7c00))) {


@@ -490,28 +488,35 @@ diff -Nur linux-2.6.15/arch/mips/aruba/irq.c linux-2.6.15-openwrt/arch/mips/arub
 +              case MACH_ARUBA_AP65:
 +              case MACH_ARUBA_AP60:
 +              default:
 +              case MACH_ARUBA_AP65:
 +              case MACH_ARUBA_AP60:
 +              default:

-+                      if (cp0_cause & 0x4000) {
++                      if (cp0_cause & 0x4000) { // 1 << (8 +6) == irq 6

 +                              // Misc Interrupt
 +                              group = 0;
 +                              addr = intr_group_merlot[group].base_addr;
 +                              pend = READ_PEND_MERLOT(addr);
 +                              pend &= READ_MASK_MERLOT(addr); // only unmasked interrupts
 +                              /* handle one misc interrupt at a time */
 +                              // Misc Interrupt
 +                              group = 0;
 +                              addr = intr_group_merlot[group].base_addr;
 +                              pend = READ_PEND_MERLOT(addr);
 +                              pend &= READ_MASK_MERLOT(addr); // only unmasked interrupts
 +                              /* handle one misc interrupt at a time */

-+                              while (pend) {
-+                                      unsigned int intr_bit, irq_nr;
-+                                      intr_bit = pend ^ (pend - 1);
-+                                      irq_nr = ((31 - rc32434_clz(pend)) + GROUP0_IRQ_BASE);
++                              while (pend)
++                              {
++                                      unsigned long intr_bit;
++                                      unsigned int irq_nr;
++
++                                      intr_bit = (31 - rc32434_clz(pend));
++                                      irq_nr = intr_bit + GROUP0_IRQ_BASE;
++

 +                                      do_IRQ(irq_nr, regs);
 +                                      do_IRQ(irq_nr, regs);

-+                                      pend &= ~intr_bit;
++                                      pend &= ~(1 << intr_bit);

 +                              }
 +                              }

-+                      }
-+                      if (cp0_cause & 0x3c00) {
-+                              while (cp0_cause) {
-+                                      unsigned int intr_bit, irq_nr;
-+                                      intr_bit = cp0_cause ^ (cp0_cause - 1);
-+                                      irq_nr = ((31 - rc32434_clz(cp0_cause)) - GROUP0_IRQ_BASE);
++                      } else if (cp0_cause & 0x3c00) { // irq 2-5
++                              while (cp0_cause)
++                              {
++                                      unsigned long intr_bit;
++                                      unsigned int irq_nr;
++
++                                      intr_bit = (31 - rc32434_clz(cp0_cause));
++                                      irq_nr = intr_bit - GROUP0_IRQ_BASE;
++

 +                                      do_IRQ(irq_nr, regs);
 +                                      do_IRQ(irq_nr, regs);

-+                                      cp0_cause &= ~intr_bit;
++                                      cp0_cause &= ~(1 << intr_bit);

 +                              }
 +                      }
 +                      break;
 +                              }
 +                      }
 +                      break;