allow the kernel to provide own series files for specific subdirs

[openwrt.git] / target / linux / rdc-2.6 / patches / 000-rdc_fixes.patch

diff --git a/target/linux/rdc-2.6/patches/000-rdc_fixes.patch b/target/linux/rdc-2.6/patches/000-rdc_fixes.patch
index 1f0ac21..306fac7 100644 (file)
--- a/target/linux/rdc-2.6/patches/000-rdc_fixes.patch
+++ b/target/linux/rdc-2.6/patches/000-rdc_fixes.patch
@@ -30,12 +30,42 @@ diff -urN linux-2.6.19/arch/i386/Makefile linux-2.6.19.new/arch/i386/Makefile
  
  # default subarch .h files
  mflags-y += -Iinclude/asm-i386/mach-default
-diff -urN linux-2.6.19/arch/i386/mach-rdc/Makefile linux-2.6.19.new/arch/i386/mach-rdc/Makefile
---- linux-2.6.19/arch/i386/mach-rdc/Makefile   1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.19.new/arch/i386/mach-rdc/Makefile       2006-12-17 17:13:33.000000000 +0100
-@@ -0,0 +1,5 @@
-+#
-+# Makefile for the linux kernel.
-+#
+--- timex.h    2007-08-07 10:44:03.816112250 -0700
++++ linux/include/asm-i386/timex.h     2007-08-07 10:48:47.905866750 -0700
+@@ -11,6 +11,8 @@
+ 
+ #ifdef CONFIG_X86_ELAN
+ #  define CLOCK_TICK_RATE 1189200 /* AMD Elan has different frequency! */
++#elif defined(CONFIG_X86_RDC)
++#  define CLOCK_TICK_RATE 1041667 /* Underlying HZ for R8610 */
+ #else
+ #  define CLOCK_TICK_RATE 1193182 /* Underlying HZ */
+ #endif
+--- reboot_fixups.c    2007-08-07 12:02:00.908412250 -0700
++++ linux/arch/i386/kernel/reboot_fixups.c     2007-08-07 12:18:49.391438500 -0700
+@@ -13,6 +13,17 @@
+ #include <linux/pci.h>
+ #include <asm/reboot_fixups.h>
+ #include <asm/msr.h>
++
++static void r8610_reset(struct pci_dev *dev)
++{
++      int i;
 +
-+obj-$(CONFIG_X86_RDC)        := gpio.o platform.o
++      outl(0x80003840,0xCF8);
++      i=inl(0xCFC);
++      i |= 0x1600;
++      outl(i,0xCFC);
++      outb(1,0x92);
++}
+ 
+ static void cs5530a_warm_reset(struct pci_dev *dev)
+ {
+@@ -40,6 +53,7 @@
+ };
+ 
+ static struct device_fixup fixups_table[] = {
++{ 0x17F3, 0x6030, r8610_reset },
+ { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5530_LEGACY, cs5530a_warm_reset },
+ { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA, cs5536_warm_reset },
+ };