/*
* Atheros AR71xx built-in ethernet mac driver
*
- * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
+ * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* Based on Atheros' AG7100 driver
* by the Free Software Foundation.
*/
-#include <linux/cache.h>
#include "ag71xx.h"
#define AG71XX_DEFAULT_MSG_ENABLE \
return;
for (i = 0; i < AG71XX_RX_RING_SIZE; i++)
- if (ring->buf[i].skb)
+ if (ring->buf[i].skb) {
+ dma_unmap_single(&ag->dev->dev, ring->buf[i].dma_addr,
+ AG71XX_RX_PKT_SIZE, DMA_FROM_DEVICE);
kfree_skb(ring->buf[i].skb);
-
+ }
}
static int ag71xx_ring_rx_init(struct ag71xx *ag)
for (i = 0; i < AG71XX_RX_RING_SIZE; i++) {
struct sk_buff *skb;
+ dma_addr_t dma_addr;
- skb = dev_alloc_skb(AG71XX_RX_PKT_SIZE);
+ skb = dev_alloc_skb(AG71XX_RX_PKT_SIZE + AG71XX_RX_PKT_RESERVE);
if (!skb) {
ret = -ENOMEM;
break;
}
- dma_map_single(NULL, skb->data, AG71XX_RX_PKT_SIZE,
- DMA_FROM_DEVICE);
-
skb->dev = ag->dev;
skb_reserve(skb, AG71XX_RX_PKT_RESERVE);
+ dma_addr = dma_map_single(&ag->dev->dev, skb->data,
+ AG71XX_RX_PKT_SIZE,
+ DMA_FROM_DEVICE);
ring->buf[i].skb = skb;
- ring->buf[i].desc->data = virt_to_phys(skb->data);
+ ring->buf[i].dma_addr = dma_addr;
+ ring->buf[i].desc->data = (u32) dma_addr;
ring->buf[i].desc->ctrl = DESC_EMPTY;
}
i = ring->dirty % AG71XX_RX_RING_SIZE;
if (ring->buf[i].skb == NULL) {
+ dma_addr_t dma_addr;
struct sk_buff *skb;
- skb = dev_alloc_skb(AG71XX_RX_PKT_SIZE);
+ skb = dev_alloc_skb(AG71XX_RX_PKT_SIZE +
+ AG71XX_RX_PKT_RESERVE);
if (skb == NULL)
break;
- dma_map_single(NULL, skb->data, AG71XX_RX_PKT_SIZE,
- DMA_FROM_DEVICE);
-
skb_reserve(skb, AG71XX_RX_PKT_RESERVE);
skb->dev = ag->dev;
+ dma_addr = dma_map_single(&ag->dev->dev, skb->data,
+ AG71XX_RX_PKT_SIZE,
+ DMA_FROM_DEVICE);
+
ring->buf[i].skb = skb;
- ring->buf[i].desc->data = virt_to_phys(skb->data);
+ ring->buf[i].dma_addr = dma_addr;
+ ring->buf[i].desc->data = (u32) dma_addr;
}
ring->buf[i].desc->ctrl = DESC_EMPTY;
ag71xx_ring_free(&ag->tx_ring);
}
+static unsigned char *ag71xx_speed_str(struct ag71xx *ag)
+{
+ switch (ag->speed) {
+ case SPEED_1000:
+ return "1000";
+ case SPEED_100:
+ return "100";
+ case SPEED_10:
+ return "10";
+ }
+
+ return "?";
+}
+
+void ag71xx_link_adjust(struct ag71xx *ag)
+{
+ struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
+ u32 cfg2;
+ u32 ifctl;
+ u32 fifo5;
+ u32 mii_speed;
+
+ if (!ag->link) {
+ netif_carrier_off(ag->dev);
+ if (netif_msg_link(ag))
+ printk(KERN_INFO "%s: link down\n", ag->dev->name);
+ return;
+ }
+
+ cfg2 = ag71xx_rr(ag, AG71XX_REG_MAC_CFG2);
+ cfg2 &= ~(MAC_CFG2_IF_1000 | MAC_CFG2_IF_10_100 | MAC_CFG2_FDX);
+ cfg2 |= (ag->duplex) ? MAC_CFG2_FDX : 0;
+
+ ifctl = ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL);
+ ifctl &= ~(MAC_IFCTL_SPEED);
+
+ fifo5 = ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5);
+ fifo5 &= ~FIFO_CFG5_BM;
+
+ switch (ag->speed) {
+ case SPEED_1000:
+ mii_speed = MII_CTRL_SPEED_1000;
+ cfg2 |= MAC_CFG2_IF_1000;
+ fifo5 |= FIFO_CFG5_BM;
+ break;
+ case SPEED_100:
+ mii_speed = MII_CTRL_SPEED_100;
+ cfg2 |= MAC_CFG2_IF_10_100;
+ ifctl |= MAC_IFCTL_SPEED;
+ break;
+ case SPEED_10:
+ mii_speed = MII_CTRL_SPEED_10;
+ cfg2 |= MAC_CFG2_IF_10_100;
+ break;
+ default:
+ BUG();
+ return;
+ }
+
+ if (pdata->is_ar91xx)
+ ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, 0x00780fff);
+ else if (pdata->is_ar724x)
+ ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, pdata->fifo_cfg3);
+ else
+ ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, 0x008001ff);
+
+ if (pdata->set_pll)
+ pdata->set_pll(ag->speed);
+
+ ag71xx_mii_ctrl_set_speed(ag, mii_speed);
+
+ ag71xx_wr(ag, AG71XX_REG_MAC_CFG2, cfg2);
+ ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5, fifo5);
+ ag71xx_wr(ag, AG71XX_REG_MAC_IFCTL, ifctl);
+
+ netif_carrier_on(ag->dev);
+ if (netif_msg_link(ag))
+ printk(KERN_INFO "%s: link up (%sMbps/%s duplex)\n",
+ ag->dev->name,
+ ag71xx_speed_str(ag),
+ (DUPLEX_FULL == ag->duplex) ? "Full" : "Half");
+
+ DBG("%s: fifo_cfg0=%#x, fifo_cfg1=%#x, fifo_cfg2=%#x\n",
+ ag->dev->name,
+ ag71xx_rr(ag, AG71XX_REG_FIFO_CFG0),
+ ag71xx_rr(ag, AG71XX_REG_FIFO_CFG1),
+ ag71xx_rr(ag, AG71XX_REG_FIFO_CFG2));
+
+ DBG("%s: fifo_cfg3=%#x, fifo_cfg4=%#x, fifo_cfg5=%#x\n",
+ ag->dev->name,
+ ag71xx_rr(ag, AG71XX_REG_FIFO_CFG3),
+ ag71xx_rr(ag, AG71XX_REG_FIFO_CFG4),
+ ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5));
+
+ DBG("%s: mac_cfg2=%#x, mac_ifctl=%#x, mii_ctrl=%#x\n",
+ ag->dev->name,
+ ag71xx_rr(ag, AG71XX_REG_MAC_CFG2),
+ ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL),
+ ag71xx_mii_ctrl_rr(ag));
+}
+
static void ag71xx_hw_set_macaddr(struct ag71xx *ag, unsigned char *mac)
{
u32 t;
- t = (((u32) mac[0]) << 24) | (((u32) mac[1]) << 16)
- | (((u32) mac[2]) << 8) | ((u32) mac[3]);
+ t = (((u32) mac[5]) << 24) | (((u32) mac[4]) << 16)
+ | (((u32) mac[3]) << 8) | ((u32) mac[2]);
ag71xx_wr(ag, AG71XX_REG_MAC_ADDR1, t);
- t = (((u32) mac[4]) << 24) | (((u32) mac[5]) << 16);
+ t = (((u32) mac[1]) << 24) | (((u32) mac[0]) << 16);
ag71xx_wr(ag, AG71XX_REG_MAC_ADDR2, t);
}
mdelay(100);
/* setup MAC configuration registers */
- ag71xx_wr(ag, AG71XX_REG_MAC_CFG1, MAC_CFG1_INIT);
+ if (pdata->is_ar724x)
+ ag71xx_wr(ag, AG71XX_REG_MAC_CFG1,
+ MAC_CFG1_INIT | MAC_CFG1_TFC | MAC_CFG1_RFC);
+ else
+ ag71xx_wr(ag, AG71XX_REG_MAC_CFG1, MAC_CFG1_INIT);
+
ag71xx_sb(ag, AG71XX_REG_MAC_CFG2,
MAC_CFG2_PAD_CRC_EN | MAC_CFG2_LEN_CHECK);
struct ag71xx *ag = netdev_priv(dev);
unsigned long flags;
+ netif_carrier_off(dev);
+ ag71xx_phy_stop(ag);
+
spin_lock_irqsave(&ag->lock, flags);
netif_stop_queue(dev);
ag71xx_hw_stop(ag);
- netif_carrier_off(dev);
- ag71xx_phy_stop(ag);
-
napi_disable(&ag->napi);
del_timer_sync(&ag->oom_timer);
return 0;
}
-static int ag71xx_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
+static netdev_tx_t ag71xx_hard_start_xmit(struct sk_buff *skb,
+ struct net_device *dev)
{
struct ag71xx *ag = netdev_priv(dev);
struct ag71xx_ring *ring = &ag->tx_ring;
struct ag71xx_desc *desc;
+ dma_addr_t dma_addr;
int i;
i = ring->curr % AG71XX_TX_RING_SIZE;
goto err_drop;
}
- dma_map_single(NULL, skb->data, skb->len, DMA_TO_DEVICE);
+ dma_addr = dma_map_single(&dev->dev, skb->data, skb->len,
+ DMA_TO_DEVICE);
ring->buf[i].skb = skb;
/* setup descriptor fields */
- desc->data = virt_to_phys(skb->data);
+ desc->data = (u32) dma_addr;
desc->ctrl = (skb->len & DESC_PKTLEN_M);
/* flush descriptor */
/* enable TX engine */
ag71xx_wr(ag, AG71XX_REG_TX_CTRL, TX_CTRL_TXE);
- dev->trans_start = jiffies;
-
- return 0;
+ return NETDEV_TX_OK;
err_drop:
dev->stats.tx_dropped++;
dev_kfree_skb(skb);
- return 0;
+ return NETDEV_TX_OK;
}
static int ag71xx_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
ag71xx_open(ag->dev);
}
-static void ag71xx_tx_packets(struct ag71xx *ag)
+static int ag71xx_tx_packets(struct ag71xx *ag)
{
struct ag71xx_ring *ring = &ag->tx_ring;
- unsigned int sent;
+ int sent;
DBG("%s: processing TX ring\n", ag->dev->name);
if ((ring->curr - ring->dirty) < AG71XX_TX_THRES_WAKEUP)
netif_wake_queue(ag->dev);
+ return sent;
}
static int ag71xx_rx_packets(struct ag71xx *ag, int limit)
pktlen = ag71xx_desc_pktlen(desc);
pktlen -= ETH_FCS_LEN;
+ dma_unmap_single(&dev->dev, ring->buf[i].dma_addr,
+ AG71XX_RX_PKT_SIZE, DMA_FROM_DEVICE);
+
skb_put(skb, pktlen);
skb->dev = dev;
struct ag71xx_ring *rx_ring;
unsigned long flags;
u32 status;
- int done;
+ int tx_done;
+ int rx_done;
pdata->ddr_flush();
- ag71xx_tx_packets(ag);
+ tx_done = ag71xx_tx_packets(ag);
DBG("%s: processing RX ring\n", dev->name);
- done = ag71xx_rx_packets(ag, limit);
+ rx_done = ag71xx_rx_packets(ag, limit);
+
+ ag71xx_debugfs_update_napi_stats(ag, rx_done, tx_done);
rx_ring = &ag->rx_ring;
if (rx_ring->buf[rx_ring->dirty % AG71XX_RX_RING_SIZE].skb == NULL)
ag71xx_wr(ag, AG71XX_REG_RX_CTRL, RX_CTRL_RXE);
}
- if (done < limit) {
+ if (rx_done < limit) {
if (status & RX_STATUS_PR)
goto more;
if (status & TX_STATUS_PS)
goto more;
- DBG("%s: disable polling mode, done=%d, limit=%d\n",
- dev->name, done, limit);
+ DBG("%s: disable polling mode, rx=%d, tx=%d,limit=%d\n",
+ dev->name, rx_done, tx_done, limit);
napi_complete(napi);
spin_lock_irqsave(&ag->lock, flags);
ag71xx_int_enable(ag, AG71XX_INT_POLL);
spin_unlock_irqrestore(&ag->lock, flags);
- return done;
+ return rx_done;
}
more:
- DBG("%s: stay in polling mode, done=%d, limit=%d\n",
- dev->name, done, limit);
- return done;
+ DBG("%s: stay in polling mode, rx=%d, tx=%d, limit=%d\n",
+ dev->name, rx_done, tx_done, limit);
+ return rx_done;
oom:
if (netif_msg_rx_err(ag))
napi_schedule(&ag->napi);
}
+ ag71xx_debugfs_update_int_stats(ag, status);
+
return IRQ_HANDLED;
}
if (err)
goto err_unregister_netdev;
+ err = ag71xx_debugfs_init(ag);
+ if (err)
+ goto err_phy_disconnect;
+
platform_set_drvdata(pdev, dev);
return 0;
+ err_phy_disconnect:
+ ag71xx_phy_disconnect(ag);
err_unregister_netdev:
unregister_netdev(dev);
err_free_irq:
if (dev) {
struct ag71xx *ag = netdev_priv(dev);
+ ag71xx_debugfs_exit(ag);
ag71xx_phy_disconnect(ag);
unregister_netdev(dev);
free_irq(dev->irq, dev);
{
int ret;
- ret = ag71xx_mdio_driver_init();
+ ret = ag71xx_debugfs_root_init();
if (ret)
goto err_out;
+ ret = ag71xx_mdio_driver_init();
+ if (ret)
+ goto err_debugfs_exit;
+
ret = platform_driver_register(&ag71xx_driver);
if (ret)
goto err_mdio_exit;
err_mdio_exit:
ag71xx_mdio_driver_exit();
+ err_debugfs_exit:
+ ag71xx_debugfs_root_exit();
err_out:
return ret;
}
{
platform_driver_unregister(&ag71xx_driver);
ag71xx_mdio_driver_exit();
+ ag71xx_debugfs_root_exit();
}
module_init(ag71xx_module_init);
projects / openwrt.git / blobdiff