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[ar71xx] add preliminary support for the Atheros PB42 board
[openwrt.git]
/
target
/
linux
/
ar71xx
/
files
/
include
/
asm-mips
/
mach-ar71xx
/
ar71xx.h
diff --git
a/target/linux/ar71xx/files/include/asm-mips/mach-ar71xx/ar71xx.h
b/target/linux/ar71xx/files/include/asm-mips/mach-ar71xx/ar71xx.h
index
42db7cc
..
3895b21
100644
(file)
--- a/
target/linux/ar71xx/files/include/asm-mips/mach-ar71xx/ar71xx.h
+++ b/
target/linux/ar71xx/files/include/asm-mips/mach-ar71xx/ar71xx.h
@@
-56,6
+56,8
@@
#define AR71XX_DMA_SIZE 0x10000
#define AR71XX_STEREO_BASE (AR71XX_APB_BASE + 0x000B0000)
#define AR71XX_STEREO_SIZE 0x10000
#define AR71XX_DMA_SIZE 0x10000
#define AR71XX_STEREO_BASE (AR71XX_APB_BASE + 0x000B0000)
#define AR71XX_STEREO_SIZE 0x10000
+#define AR91XX_WMAC_BASE (AR71XX_APB_BASE + 0x000C0000)
+#define AR91XX_WMAC_SIZE 0x30000
#define AR71XX_CPU_IRQ_BASE 0
#define AR71XX_MISC_IRQ_BASE 8
#define AR71XX_CPU_IRQ_BASE 0
#define AR71XX_MISC_IRQ_BASE 8
@@
-66,6
+68,7
@@
#define AR71XX_PCI_IRQ_COUNT 4
#define AR71XX_CPU_IRQ_PCI (AR71XX_CPU_IRQ_BASE + 2)
#define AR71XX_PCI_IRQ_COUNT 4
#define AR71XX_CPU_IRQ_PCI (AR71XX_CPU_IRQ_BASE + 2)
+#define AR71XX_CPU_IRQ_WMAC (AR71XX_CPU_IRQ_BASE + 2)
#define AR71XX_CPU_IRQ_USB (AR71XX_CPU_IRQ_BASE + 3)
#define AR71XX_CPU_IRQ_GE0 (AR71XX_CPU_IRQ_BASE + 4)
#define AR71XX_CPU_IRQ_GE1 (AR71XX_CPU_IRQ_BASE + 5)
#define AR71XX_CPU_IRQ_USB (AR71XX_CPU_IRQ_BASE + 3)
#define AR71XX_CPU_IRQ_GE0 (AR71XX_CPU_IRQ_BASE + 4)
#define AR71XX_CPU_IRQ_GE1 (AR71XX_CPU_IRQ_BASE + 5)
@@
-114,6
+117,10
@@
extern unsigned long ar71xx_mach_type;
#define AR71XX_MACH_AW_NR580 6 /* AzureWave AW-NR580 */
#define AR71XX_MACH_AP83 7 /* Atheros AP83 */
#define AR71XX_MACH_TEW_632BRP 8 /* TRENDnet TEW-632BRP */
#define AR71XX_MACH_AW_NR580 6 /* AzureWave AW-NR580 */
#define AR71XX_MACH_AP83 7 /* Atheros AP83 */
#define AR71XX_MACH_TEW_632BRP 8 /* TRENDnet TEW-632BRP */
+#define AR71XX_MACH_UBNT_RS 9 /* Ubiquiti RouterStation */
+#define AR71XX_MACH_UBNT_LSX 10 /* Ubiquiti LSX */
+#define AR71XX_MACH_WNR2000 11 /* NETGEAR WNR2000 */
+#define AR71XX_MACH_PB42 12 /* Atheros PB42 */
/*
* PLL block
/*
* PLL block
@@
-199,9
+206,8
@@
extern void ar71xx_add_device_usb(void) __init;
#define GPIO_FUNC_STEREO_EN BIT(17)
#define GPIO_FUNC_SLIC_EN BIT(16)
#define GPIO_FUNC_STEREO_EN BIT(17)
#define GPIO_FUNC_SLIC_EN BIT(16)
-#define GPIO_FUNC_SPI_CS1_EN BIT(15)
-#define GPIO_FUNC_SPI_CS0_EN BIT(14)
-#define GPIO_FUNC_SPI_EN BIT(13)
+#define GPIO_FUNC_SPI_CS2_EN BIT(13)
+#define GPIO_FUNC_SPI_CS1_EN BIT(12)
#define GPIO_FUNC_UART_EN BIT(8)
#define GPIO_FUNC_USB_OC_EN BIT(4)
#define GPIO_FUNC_USB_CLK_EN BIT(0)
#define GPIO_FUNC_UART_EN BIT(8)
#define GPIO_FUNC_USB_OC_EN BIT(4)
#define GPIO_FUNC_USB_CLK_EN BIT(0)
@@
-341,6
+347,7
@@
extern void ar71xx_ddr_flush(u32 reg);
#define RESET_MODULE_EXTERNAL BIT(28)
#define RESET_MODULE_FULL_CHIP BIT(24)
#define RESET_MODULE_EXTERNAL BIT(28)
#define RESET_MODULE_FULL_CHIP BIT(24)
+#define RESET_MODULE_AMBA2WMAC BIT(22)
#define RESET_MODULE_CPU_NMI BIT(21)
#define RESET_MODULE_CPU_COLD BIT(20)
#define RESET_MODULE_DMA BIT(19)
#define RESET_MODULE_CPU_NMI BIT(21)
#define RESET_MODULE_CPU_COLD BIT(20)
#define RESET_MODULE_DMA BIT(19)
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