+--- a/drivers/bcma/driver_chipcommon.c
++++ b/drivers/bcma/driver_chipcommon.c
+@@ -23,6 +23,9 @@ static inline u32 bcma_cc_write32_masked
+
+ void bcma_core_chipcommon_init(struct bcma_drv_cc *cc)
+ {
++ u32 leddc_on = 10;
++ u32 leddc_off = 90;
++
+ if (cc->core->id.rev >= 11)
+ cc->status = bcma_cc_read32(cc, BCMA_CC_CHIPSTAT);
+ cc->capabilities = bcma_cc_read32(cc, BCMA_CC_CAP);
+@@ -38,6 +41,17 @@ void bcma_core_chipcommon_init(struct bc
+ bcma_pmu_init(cc);
+ if (cc->capabilities & BCMA_CC_CAP_PCTL)
+ pr_err("Power control not implemented!\n");
++
++ if (cc->core->id.rev >= 16) {
++ if (cc->core->bus->sprom.leddc_on_time &&
++ cc->core->bus->sprom.leddc_off_time) {
++ leddc_on = cc->core->bus->sprom.leddc_on_time;
++ leddc_off = cc->core->bus->sprom.leddc_off_time;
++ }
++ bcma_cc_write32(cc, BCMA_CC_GPIOTIMER,
++ ((leddc_on << BCMA_CC_GPIOTIMER_ONTIME_SHIFT) |
++ (leddc_off << BCMA_CC_GPIOTIMER_OFFTIME_SHIFT)));
++ }
+ }
+
+ /* Set chip watchdog reset timer to fire in 'ticks' backplane cycles */
+--- /dev/null
++++ b/drivers/bcma/driver_pci_host.c
+@@ -0,0 +1,14 @@
++/*
++ * Broadcom specific AMBA
++ * PCI Core in hostmode
++ *
++ * Licensed under the GNU/GPL. See COPYING for details.
++ */
++
++#include "bcma_private.h"
++#include <linux/bcma/bcma.h>
++
++void bcma_core_pci_hostmode_init(struct bcma_drv_pci *pc)
++{
++ pr_err("No support for PCI core in hostmode yet\n");
++}
+--- a/include/linux/bcma/bcma_regs.h
++++ b/include/linux/bcma/bcma_regs.h
+@@ -1,13 +1,38 @@
+ #ifndef LINUX_BCMA_REGS_H_
+ #define LINUX_BCMA_REGS_H_
+
++/* Some single registers are shared between many cores */
++/* BCMA_CLKCTLST: ChipCommon (rev >= 20), PCIe, 80211 */
++#define BCMA_CLKCTLST 0x01E0 /* Clock control and status */
++#define BCMA_CLKCTLST_FORCEALP 0x00000001 /* Force ALP request */
++#define BCMA_CLKCTLST_FORCEHT 0x00000002 /* Force HT request */
++#define BCMA_CLKCTLST_FORCEILP 0x00000004 /* Force ILP request */
++#define BCMA_CLKCTLST_HAVEALPREQ 0x00000008 /* ALP available request */
++#define BCMA_CLKCTLST_HAVEHTREQ 0x00000010 /* HT available request */
++#define BCMA_CLKCTLST_HWCROFF 0x00000020 /* Force HW clock request off */
++#define BCMA_CLKCTLST_EXTRESREQ 0x00000700 /* Mask of external resource requests */
++#define BCMA_CLKCTLST_HAVEALP 0x00010000 /* ALP available */
++#define BCMA_CLKCTLST_HAVEHT 0x00020000 /* HT available */
++#define BCMA_CLKCTLST_BP_ON_ALP 0x00040000 /* RO: running on ALP clock */
++#define BCMA_CLKCTLST_BP_ON_HT 0x00080000 /* RO: running on HT clock */
++#define BCMA_CLKCTLST_EXTRESST 0x07000000 /* Mask of external resource status */
++/* Is there any BCM4328 on BCMA bus? */
++#define BCMA_CLKCTLST_4328A0_HAVEHT 0x00010000 /* 4328a0 has reversed bits */
++#define BCMA_CLKCTLST_4328A0_HAVEALP 0x00020000 /* 4328a0 has reversed bits */
++
+ /* Agent registers (common for every core) */
+-#define BCMA_IOCTL 0x0408
++#define BCMA_IOCTL 0x0408 /* IO control */
+ #define BCMA_IOCTL_CLK 0x0001
+ #define BCMA_IOCTL_FGC 0x0002
+ #define BCMA_IOCTL_CORE_BITS 0x3FFC
+ #define BCMA_IOCTL_PME_EN 0x4000
+ #define BCMA_IOCTL_BIST_EN 0x8000
++#define BCMA_IOST 0x0500 /* IO status */
++#define BCMA_IOST_CORE_BITS 0x0FFF
++#define BCMA_IOST_DMA64 0x1000
++#define BCMA_IOST_GATED_CLK 0x2000
++#define BCMA_IOST_BIST_ERROR 0x4000
++#define BCMA_IOST_BIST_DONE 0x8000
+ #define BCMA_RESET_CTL 0x0800
+ #define BCMA_RESET_CTL_RESET 0x0001
+
projects / openwrt.git / blobdiff