--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
-@@ -1464,7 +1464,16 @@ void __cpuinit per_cpu_trap_init(void)
- */
+@@ -1496,7 +1496,18 @@ void __cpuinit per_cpu_trap_init(void)
if (cpu_has_mips_r2) {
- cp0_compare_irq = (read_c0_intctl() >> 29) & 7;
+ cp0_compare_irq_shift = CAUSEB_TI - CAUSEB_IP;
+ cp0_compare_irq = (read_c0_intctl() >> INTCTLB_IPTI) & 7;
++
+ if (!cp0_compare_irq)
+ cp0_compare_irq = CP0_LEGACY_COMPARE_IRQ;
+
- cp0_perfcount_irq = (read_c0_intctl() >> 26) & 7;
+ cp0_perfcount_irq = (read_c0_intctl() >> INTCTLB_IPPCI) & 7;
++
+ if (!cp0_perfcount_irq)
+ cp0_perfcount_irq = CP0_LEGACY_PERFCNT_IRQ;
+
if (cp0_perfcount_irq == cp0_compare_irq)
cp0_perfcount_irq = -1;
} else {
---- a/include/asm-mips/irq.h
-+++ b/include/asm-mips/irq.h
-@@ -156,8 +156,12 @@ extern void free_irqno(unsigned int irq)
+--- a/arch/mips/include/asm/irq.h
++++ b/arch/mips/include/asm/irq.h
+@@ -133,9 +133,11 @@ extern void free_irqno(unsigned int irq)
* IE7. Since R2 their number has to be read from the c0_intctl register.
*/
#define CP0_LEGACY_COMPARE_IRQ 7
+#define CP0_LEGACY_PERFCNT_IRQ 7
extern int cp0_compare_irq;
+ extern int cp0_compare_irq_shift;
extern int cp0_perfcount_irq;
-
+extern void __weak arch_fixup_c0_irqs(void);
-+
-+
+
#endif /* _ASM_IRQ_H */