{
struct ssb_bus *bus = pc->dev->bus;
u16 chipid_top;
-@@ -403,28 +408,129 @@ static int pcicore_is_in_hostmode(struct
+@@ -403,25 +408,133 @@ static int pcicore_is_in_hostmode(struct
}
#endif /* CONFIG_SSB_PCICORE_HOSTMODE */
-static void ssb_pcicore_init_clientmode(struct ssb_pcicore *pc)
+static void __devinit ssb_pcicore_init_clientmode(struct ssb_pcicore *pc)
{
++ ssb_pcicore_fix_sprom_core_index(pc);
++
/* Disable PCI interrupts. */
ssb_write32(pc->dev, SSB_INTVEC, 0);
++
++ /* Additional PCIe always once-executed workarounds */
++ if (pc->dev->id.coreid == SSB_DEV_PCIE) {
++ ssb_pcicore_serdes_workaround(pc);
++ /* TODO: ASPM */
++ /* TODO: Clock Request Update */
++ }
}
-void ssb_pcicore_init(struct ssb_pcicore *pc)
if (!ssb_device_is_enabled(dev))
ssb_device_enable(dev, 0);
-+ ssb_pcicore_fix_sprom_core_index(pc);
-+
- #ifdef CONFIG_SSB_PCICORE_HOSTMODE
- pc->hostmode = pcicore_is_in_hostmode(pc);
- if (pc->hostmode)
-@@ -432,6 +538,13 @@ void ssb_pcicore_init(struct ssb_pcicore
- #endif /* CONFIG_SSB_PCICORE_HOSTMODE */
- if (!pc->hostmode)
- ssb_pcicore_init_clientmode(pc);
-+
-+ /* Additional PCIe always once-executed workarounds */
-+ if (dev->id.coreid == SSB_DEV_PCIE) {
-+ ssb_pcicore_serdes_workaround(pc);
-+ /* TODO: ASPM */
-+ /* TODO: Clock Request Update */
-+ }
- }
-
- static u32 ssb_pcie_read(struct ssb_pcicore *pc, u32 address)
@@ -446,11 +559,35 @@ static void ssb_pcie_write(struct ssb_pc
pcicore_write32(pc, 0x134, data);
}
{
int err;
+@@ -1001,8 +1002,8 @@ u32 ssb_calc_clock_rate(u32 plltype, u32
+ switch (plltype) {
+ case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */
+ if (m & SSB_CHIPCO_CLK_T6_MMASK)
+- return SSB_CHIPCO_CLK_T6_M0;
+- return SSB_CHIPCO_CLK_T6_M1;
++ return SSB_CHIPCO_CLK_T6_M1;
++ return SSB_CHIPCO_CLK_T6_M0;
+ case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
+ case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
+ case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
@@ -1117,23 +1118,22 @@ static u32 ssb_tmslow_reject_bitmask(str
{
u32 rev = ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_SSBREV;
}
int ssb_device_is_enabled(struct ssb_device *dev)
-@@ -1309,20 +1309,20 @@ EXPORT_SYMBOL(ssb_bus_may_powerdown);
+@@ -1266,7 +1266,10 @@ u32 ssb_dma_translation(struct ssb_devic
+ case SSB_BUSTYPE_SSB:
+ return 0;
+ case SSB_BUSTYPE_PCI:
+- return SSB_PCI_DMA;
++ if (ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_DMA64)
++ return SSB_PCIE_DMA_H32;
++ else
++ return SSB_PCI_DMA;
+ default:
+ __ssb_dma_not_implemented(dev);
+ }
+@@ -1309,20 +1312,20 @@ EXPORT_SYMBOL(ssb_bus_may_powerdown);
int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl)
{
return 0;
error:
ssb_printk(KERN_ERR PFX "Bus powerup failed\n");
-@@ -1330,6 +1330,37 @@ error:
+@@ -1330,6 +1333,37 @@ error:
}
EXPORT_SYMBOL(ssb_bus_powerup);
err = 0;
goto out_free;
}
+@@ -728,12 +734,9 @@ out_free:
+ static void ssb_pci_get_boardinfo(struct ssb_bus *bus,
+ struct ssb_boardinfo *bi)
+ {
+- pci_read_config_word(bus->host_pci, PCI_SUBSYSTEM_VENDOR_ID,
+- &bi->vendor);
+- pci_read_config_word(bus->host_pci, PCI_SUBSYSTEM_ID,
+- &bi->type);
+- pci_read_config_word(bus->host_pci, PCI_REVISION_ID,
+- &bi->rev);
++ bi->vendor = bus->host_pci->subsystem_vendor;
++ bi->type = bus->host_pci->subsystem_device;
++ bi->rev = bus->host_pci->revision;
+ }
+
+ int ssb_pci_get_invariants(struct ssb_bus *bus,
--- a/drivers/ssb/pcihost_wrapper.c
+++ b/drivers/ssb/pcihost_wrapper.c
@@ -53,8 +53,8 @@ static int ssb_pcihost_resume(struct pci
return 1;
}
#endif /* CONFIG_SSB_PCIHOST */
-@@ -307,7 +310,7 @@ int ssb_bus_scan(struct ssb_bus *bus,
+@@ -307,8 +310,7 @@ int ssb_bus_scan(struct ssb_bus *bus,
} else {
if (bus->bustype == SSB_BUSTYPE_PCI) {
bus->chip_id = pcidev_to_chipid(bus->host_pci);
- pci_read_config_word(bus->host_pci, PCI_REVISION_ID,
-+ pci_read_config_byte(bus->host_pci, PCI_REVISION_ID,
- &bus->chip_rev);
+- &bus->chip_rev);
++ bus->chip_rev = bus->host_pci->revision;
bus->chip_package = 0;
} else {
+ bus->chip_id = 0x4710;
--- a/drivers/ssb/sprom.c
+++ b/drivers/ssb/sprom.c
@@ -17,7 +17,7 @@
/* core.c */
--- a/include/linux/ssb/ssb.h
+++ b/include/linux/ssb/ssb.h
-@@ -308,7 +308,7 @@ struct ssb_bus {
+@@ -27,6 +27,8 @@ struct ssb_sprom {
+ u8 et1mdcport; /* MDIO for enet1 */
+ u8 board_rev; /* Board revision number from SPROM. */
+ u8 country_code; /* Country Code */
++ u16 leddc_on_time; /* LED Powersave Duty Cycle On Count */
++ u16 leddc_off_time; /* LED Powersave Duty Cycle Off Count */
+ u8 ant_available_a; /* 2GHz antenna available bits (up to 4) */
+ u8 ant_available_bg; /* 5GHz antenna available bits (up to 4) */
+ u16 pa0b0;
+@@ -99,7 +101,7 @@ struct ssb_sprom {
+ struct ssb_boardinfo {
+ u16 vendor;
+ u16 type;
+- u16 rev;
++ u8 rev;
+ };
+
+
+@@ -308,7 +310,7 @@ struct ssb_bus {
/* ID information about the Chip. */
u16 chip_id;
u16 sprom_offset;
u16 sprom_size; /* number of words in sprom */
u8 chip_package;
-@@ -404,7 +404,9 @@ extern bool ssb_is_sprom_available(struc
+@@ -404,7 +406,9 @@ extern bool ssb_is_sprom_available(struc
/* Set a fallback SPROM.
* See kdoc at the function definition for complete documentation. */
/* Suspend a SSB bus.
* Call this from the parent bus suspend routine. */
-@@ -518,6 +520,7 @@ extern int ssb_bus_may_powerdown(struct
+@@ -518,6 +522,7 @@ extern int ssb_bus_may_powerdown(struct
* Otherwise static always-on powercontrol will be used. */
extern int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl);
projects / openwrt.git / blobdiff