disable dsp freq use for vlynq bus clock init, disable external clocking (it locks...

[openwrt.git] / target / Config.in

diff --git a/target/Config.in b/target/Config.in
index e506512..0c8864f 100644 (file)
--- a/target/Config.in
+++ b/target/Config.in
@@ -17,12 +17,6 @@ config PCMCIA_SUPPORT
 config USB_SUPPORT
        bool
 
-config ATM_SUPPORT
-       bool
-
-config VIDEO_SUPPORT
-       bool
-
 config BIG_ENDIAN
        bool
 
@@ -35,6 +29,9 @@ config USES_JFFS2
 config USES_EXT2
        bool
 
+config USES_TGZ
+       bool
+
 config PROFILE_KCONFIG 
        bool