-+#ifndef GT_IMGHDR_H\r
-+#define GT_IMGHDR_H\r
-+\r
-+#define GTIMG_MAGIC "GMTK"\r
-+\r
-+/* Product ID */\r
-+#define PID_RTL_AIRGO 1\r
-+#define PID_RTL_RALINK 2\r
-+#define PID_RDC_AIRGO 3\r
-+#define PID_RDC_RALINK 5 /* White Lable */\r
-+\r
-+/* Gemtek */\r
-+typedef struct\r
-+{\r
-+ UINT8 magic[4]; /* ASICII: GMTK */\r
-+ UINT32 checksum; /* CRC32 */\r
-+ UINT32 version; /* x.x.x.x */\r
-+ UINT32 kernelsz; /* The size of the kernel image */\r
-+ UINT32 imagesz; /* The length of this image file ( kernel + romfs + this header) */\r
-+ UINT32 pid; /* Product ID */\r
-+ UINT32 fastcksum; /* Partial CRC32 on (First(256), medium(256), last(512)) */\r
-+ UINT32 reserved;\r
-+}gt_imghdr_t;\r
-+\r
-+#endif\r
++#ifndef GT_IMGHDR_H
++#define GT_IMGHDR_H
++
++#define GTIMG_MAGIC "GMTK"
++
++/* Product ID */
++#define PID_RTL_AIRGO 1
++#define PID_RTL_RALINK 2
++#define PID_RDC_AIRGO 3
++#define PID_RDC_RALINK 5 /* White Lable */
++
++/* Gemtek */
++typedef struct
++{
++ UINT8 magic[4]; /* ASICII: GMTK */
++ UINT32 checksum; /* CRC32 */
++ UINT32 version; /* x.x.x.x */
++ UINT32 kernelsz; /* The size of the kernel image */
++ UINT32 imagesz; /* The length of this image file ( kernel + romfs + this header) */
++ UINT32 pid; /* Product ID */
++ UINT32 fastcksum; /* Partial CRC32 on (First(256), medium(256), last(512)) */
++ UINT32 reserved;
++}gt_imghdr_t;
++
++#endif