u32 reset_bit;
u32 mii_if;
u8 mac_addr[ETH_ALEN];
+ struct device *mii_bus_dev;
u8 has_gbit:1;
u8 is_ar91xx:1;
+ u8 is_ar7240:1;
+ u8 is_ar724x:1;
u8 has_ar8216:1;
+ u8 has_ar7240_switch:1;
- void (* ddr_flush)(void);
- void (* set_pll)(u32 pll);
+ void (*ddr_flush)(void);
+ void (*set_pll)(int speed);
+
+ u32 fifo_cfg1;
+ u32 fifo_cfg2;
+ u32 fifo_cfg3;
};
struct ag71xx_mdio_platform_data {
u32 phy_mask;
+ int is_ar7240;
};
struct ar71xx_ehci_platform_data {