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[xburst] clocks: Fix JZ_REG_CLOCK_SLEEP_CTRL address
[openwrt.git]
/
target
/
linux
/
xburst
/
files-2.6.32
/
arch
/
mips
/
jz4740
/
pm.c
diff --git
a/target/linux/xburst/files-2.6.32/arch/mips/jz4740/pm.c
b/target/linux/xburst/files-2.6.32/arch/mips/jz4740/pm.c
index
d19bb81
..
9fb0ceb
100644
(file)
--- a/
target/linux/xburst/files-2.6.32/arch/mips/jz4740/pm.c
+++ b/
target/linux/xburst/files-2.6.32/arch/mips/jz4740/pm.c
@@
-18,45
+18,25
@@
#include <linux/delay.h>
#include <linux/suspend.h>
#include <asm/mach-jz4740/regs.h>
#include <linux/delay.h>
#include <linux/suspend.h>
#include <asm/mach-jz4740/regs.h>
+#include <asm/mach-jz4740/clock.h>
extern void jz4740_intc_suspend(void);
extern void jz4740_intc_resume(void);
static int jz_pm_enter(suspend_state_t state)
{
extern void jz4740_intc_suspend(void);
extern void jz4740_intc_resume(void);
static int jz_pm_enter(suspend_state_t state)
{
- unsigned long nfcsr = REG_EMC_NFCSR;
- uint32_t scr = REG_CPM_SCR;
-
- /* Disable nand flash */
- REG_EMC_NFCSR = ~0xff;
-
- udelay(100);
-
- /*stop udc and usb*/
- REG_CPM_SCR &= ~( 1<<6 | 1<<7);
- REG_CPM_SCR |= 0<<6 | 1<<7;
-
jz4740_intc_suspend();
jz4740_intc_suspend();
- /* Enter SLEEP mode */
- REG_CPM_LCR &= ~CPM_LCR_LPM_MASK;
- REG_CPM_LCR |= CPM_LCR_LPM_SLEEP;
+ jz4740_clock_set_wait_mode(JZ4740_WAIT_MODE_SLEEP);
+
__asm__(".set\tmips3\n\t"
"wait\n\t"
".set\tmips0");
__asm__(".set\tmips3\n\t"
"wait\n\t"
".set\tmips0");
- /* Restore to IDLE mode */
- REG_CPM_LCR &= ~CPM_LCR_LPM_MASK;
- REG_CPM_LCR |= CPM_LCR_LPM_IDLE;
-
- /* Restore nand flash control register */
- REG_EMC_NFCSR = nfcsr;
+ jz4740_clock_set_wait_mode(JZ4740_WAIT_MODE_IDLE);
jz4740_intc_resume();
jz4740_intc_resume();
- /* Restore sleep control register */
- REG_CPM_SCR = scr;
-
return 0;
}
return 0;
}
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