[adm5120] remove hardware accelerated byte swapping feature, and resync kernel config

[openwrt.git] / target / linux / adm5120-2.6 / files / drivers / net / adm5120sw.c

diff --git a/target/linux/adm5120-2.6/files/drivers/net/adm5120sw.c b/target/linux/adm5120-2.6/files/drivers/net/adm5120sw.c
index 33489e5..6c311bf 100644 (file)
--- a/target/linux/adm5120-2.6/files/drivers/net/adm5120sw.c
+++ b/target/linux/adm5120-2.6/files/drivers/net/adm5120sw.c
@@ -40,6 +40,11 @@ static unsigned char vlan_matrix[SW_DEVS] = {
        0x41, 0x42, 0x44, 0x48, 0x50, 0x60
 };
 
+/* default settings - unlimited TX and RX on all ports, default shaper mode */
+static unsigned char bw_matrix[SW_DEVS] = {
+       0, 0, 0, 0, 0, 0
+};
+
 static int adm5120_nrdevs;
 
 static struct net_device *adm5120_devs[SW_DEVS];
@@ -205,6 +210,26 @@ static void adm5120_set_vlan(char *matrix)
        adm5120_set_reg(ADM5120_VLAN_GII, val);
 }
 
+static void adm5120_set_bw(char *matrix)
+{
+       unsigned long val;
+
+       /* Port 0 to 3 are set using the bandwidth control 0 register */
+       val = matrix[0] + (matrix[1]<<8) + (matrix[2]<<16) + (matrix[3]<<24);
+       adm5120_set_reg(ADM5120_BW_CTL0, val);
+
+       /* Port 4 and 5 are set using the bandwidth control 1 register */
+       val = matrix[4];
+       if (matrix[5] == 1)
+               adm5120_set_reg(ADM5120_BW_CTL1, val | 0x80000000);
+       else
+               adm5120_set_reg(ADM5120_BW_CTL1, val & ~0x8000000);
+
+       printk(KERN_DEBUG "D: ctl0 0x%x, ctl1 0x%x\n",
+               adm5120_get_reg(ADM5120_BW_CTL0),
+               adm5120_get_reg(ADM5120_BW_CTL1));
+}
+
 static int adm5120_sw_open(struct net_device *dev)
 {
        if (!adm5120_if_open++)
@@ -346,6 +371,19 @@ static int adm5120_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
                        if (err)
                                return -EFAULT;
                        break;
+               case SIOCGETBW:
+                       err = copy_to_user(rq->ifr_data, bw_matrix, sizeof(bw_matrix));
+                       if (err)
+                               return -EFAULT;
+                       break;
+               case SIOCSETBW:
+                       if (!capable(CAP_NET_ADMIN))
+                               return -EPERM;
+                       err = copy_from_user(bw_matrix, rq->ifr_data, sizeof(bw_matrix));
+                       if (err)
+                               return -EFAULT;
+                       adm5120_set_bw(bw_matrix);
+                       break;
                default:
                        return -EOPNOTSUPP;
        }
@@ -390,9 +428,7 @@ static int __init adm5120_sw_init(void)
        if (err)
                goto out;
 
-       adm5120_nrdevs = adm5120_board.iface_num;
-       if (adm5120_nrdevs > 5 && !adm5120_has_gmii())
-               adm5120_nrdevs = 5;
+       adm5120_nrdevs = adm5120_eth_num_ports;
 
        adm5120_set_reg(ADM5120_CPUP_CONF,
            ADM5120_DISCCPUPORT | ADM5120_CRC_PADDING |
@@ -445,12 +481,8 @@ static int __init adm5120_sw_init(void)
                dev->tx_timeout = adm5120_tx_timeout;
                dev->watchdog_timeo = ETH_TX_TIMEOUT;
                dev->set_mac_address = adm5120_sw_set_mac_address;
-               /* HACK alert!!!  In the original admtek driver it is asumed
-                  that you can read the MAC addressess from flash, but edimax
-                  decided to leave that space intentionally blank...
-                */
-               memcpy(dev->dev_addr, "\x00\x50\xfc\x11\x22\x01", 6);
-               dev->dev_addr[5] += i;
+
+               memcpy(dev->dev_addr, adm5120_eth_macs[i], 6);
                adm5120_write_mac(dev);
 
                if ((err = register_netdev(dev))) {