brcm-2.4: fix conntrack structure inconsistency with iptables, which can cause proble...

[openwrt.git] / target / linux / brcm63xx / files / arch / mips / bcm63xx / cpu.c

diff --git a/target/linux/brcm63xx/files/arch/mips/bcm63xx/cpu.c b/target/linux/brcm63xx/files/arch/mips/bcm63xx/cpu.c
index b69821c..bc7ed50 100644 (file)
--- a/target/linux/brcm63xx/files/arch/mips/bcm63xx/cpu.c
+++ b/target/linux/brcm63xx/files/arch/mips/bcm63xx/cpu.c
@@ -37,6 +37,7 @@ static const unsigned long bcm96338_regs_base[] = {
        [RSET_PERF]             = BCM_6338_PERF_BASE,
        [RSET_TIMER]            = BCM_6338_TIMER_BASE,
        [RSET_WDT]              = BCM_6338_WDT_BASE,
+       [RSET_UDC0]             = BCM_6338_UDC0_BASE,
        [RSET_UART0]            = BCM_6338_UART0_BASE,
        [RSET_GPIO]             = BCM_6338_GPIO_BASE,
        [RSET_SPI]              = BCM_6338_SPI_BASE,
@@ -45,8 +46,10 @@ static const unsigned long bcm96338_regs_base[] = {
 
 static const int bcm96338_irqs[] = {
        [IRQ_TIMER]             = BCM_6338_TIMER_IRQ,
+       [IRQ_SPI]               = BCM_6338_SPI_IRQ,
        [IRQ_UART0]             = BCM_6338_UART0_IRQ,
        [IRQ_DSL]               = BCM_6338_DSL_IRQ,
+       [IRQ_UDC0]              = BCM_6338_UDC0_IRQ,
        [IRQ_ENET0]             = BCM_6338_ENET0_IRQ,
        [IRQ_ENET_PHY]          = BCM_6338_ENET_PHY_IRQ,
        [IRQ_ENET0_RXDMA]       = BCM_6338_ENET0_RXDMA_IRQ,
@@ -68,6 +71,26 @@ static const unsigned long bcm96338_regs_spi[] = {
        [SPI_RX_DATA]           = SPI_BCM_6338_SPI_RX_DATA,
 };
 
+/*
+ * 6345 register sets and irqs
+ */
+
+static const unsigned long bcm96345_regs_base[] = {
+       [RSET_PERF]             = BCM_6345_PERF_BASE,
+       [RSET_TIMER]            = BCM_6345_TIMER_BASE,
+       [RSET_WDT]              = BCM_6345_WDT_BASE,
+       [RSET_UART0]            = BCM_6345_UART0_BASE,
+       [RSET_GPIO]             = BCM_6345_GPIO_BASE,
+};
+
+static const int bcm96345_irqs[] = {
+       [IRQ_TIMER]             = BCM_6345_TIMER_IRQ,
+       [IRQ_UART0]             = BCM_6345_UART0_IRQ,
+       [IRQ_DSL]               = BCM_6345_DSL_IRQ,
+       [IRQ_ENET0]             = BCM_6345_ENET0_IRQ,
+       [IRQ_ENET_PHY]          = BCM_6345_ENET_PHY_IRQ,
+};
+
 /*
  * 6348 register sets and irqs
  */
@@ -82,6 +105,7 @@ static const unsigned long bcm96348_regs_base[] = {
        [RSET_OHCI0]            = BCM_6348_OHCI0_BASE,
        [RSET_OHCI_PRIV]        = BCM_6348_OHCI_PRIV_BASE,
        [RSET_USBH_PRIV]        = BCM_6348_USBH_PRIV_BASE,
+       [RSET_UDC0]             = BCM_6348_UDC0_BASE,
        [RSET_MPI]              = BCM_6348_MPI_BASE,
        [RSET_PCMCIA]           = BCM_6348_PCMCIA_BASE,
        [RSET_SDRAM]            = BCM_6348_SDRAM_BASE,
@@ -95,8 +119,10 @@ static const unsigned long bcm96348_regs_base[] = {
 
 static const int bcm96348_irqs[] = {
        [IRQ_TIMER]             = BCM_6348_TIMER_IRQ,
+       [IRQ_SPI]               = BCM_6348_SPI_IRQ,
        [IRQ_UART0]             = BCM_6348_UART0_IRQ,
        [IRQ_DSL]               = BCM_6348_DSL_IRQ,
+       [IRQ_UDC0]              = BCM_6348_UDC0_IRQ,
        [IRQ_ENET0]             = BCM_6348_ENET0_IRQ,
        [IRQ_ENET1]             = BCM_6348_ENET1_IRQ,
        [IRQ_ENET_PHY]          = BCM_6348_ENET_PHY_IRQ,
@@ -152,6 +178,7 @@ static const unsigned long bcm96358_regs_base[] = {
 
 static const int bcm96358_irqs[] = {
        [IRQ_TIMER]             = BCM_6358_TIMER_IRQ,
+       [IRQ_SPI]               = BCM_6358_SPI_IRQ,
        [IRQ_UART0]             = BCM_6358_UART0_IRQ,
        [IRQ_DSL]               = BCM_6358_DSL_IRQ,
        [IRQ_ENET0]             = BCM_6358_ENET0_IRQ,
@@ -179,7 +206,7 @@ static const unsigned long bcm96358_regs_spi[] = {
        [SPI_RX_TAIL]           = SPI_BCM_6358_SPI_RX_TAIL,
        [SPI_MSG_CTL]           = SPI_BCM_6358_MSG_CTL,
        [SPI_MSG_DATA]          = SPI_BCM_6358_SPI_MSG_DATA,
-       [SPI_RX_DATA]           = SPI_BCM_6358_SPI_RX_FIFO,
+       [SPI_RX_DATA]           = SPI_BCM_6358_SPI_RX_DATA,
 };
 
 u16 __bcm63xx_get_cpu_id(void)
@@ -210,9 +237,11 @@ static unsigned int detect_cpu_clock(void)
 {
        unsigned int tmp, n1 = 0, n2 = 0, m1 = 0;
 
-       if (BCMCPU_IS_6338()) {
+       if (BCMCPU_IS_6338())
                return 240000000;
-       }
+
+       if (BCMCPU_IS_6345())
+               return 140000000;
 
        /*
         * frequency depends on PLL configuration:
@@ -287,6 +316,11 @@ void __init bcm63xx_cpu_init(void)
                bcm63xx_irqs = bcm96338_irqs;
                bcm63xx_regs_spi = bcm96338_regs_spi;
                break;
+       case CPU_BCM6345:
+               expected_cpu_id = BCM6345_CPU_ID;
+               bcm63xx_regs_base = bcm96345_regs_base;
+               bcm63xx_irqs = bcm96345_irqs;
+               break;
        case CPU_BCM6348:
                expected_cpu_id = BCM6348_CPU_ID;
                bcm63xx_regs_base = bcm96348_regs_base;