+}
diff -urN linux.old/arch/mips/bcm947xx/sbmips.c linux.dev/arch/mips/bcm947xx/sbmips.c
--- linux.old/arch/mips/bcm947xx/sbmips.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/arch/mips/bcm947xx/sbmips.c 2005-08-27 02:46:21.265608528 +0200
-@@ -0,0 +1,1036 @@
++++ linux.dev/arch/mips/bcm947xx/sbmips.c 2005-09-01 01:30:26.074176728 +0200
+@@ -0,0 +1,1033 @@
+/*
+ * BCM47XX Sonics SiliconBackplane MIPS core routines
+ *
+ /* Internal backplane clock */
+ baud_base = sb_clock(sbh);
+ div = 2; /* Minimum divisor */
-+ W_REG(&cc->clkdiv,
-+ ((R_REG(&cc->clkdiv) & ~CLKD_UART) | div));
++ W_REG(&cc->clkdiv, ((R_REG(&cc->clkdiv) & ~CLKD_UART) | div));
+ } else {
+ /* Fixed internal backplane clock */
+ baud_base = 88000000;
+ tmp = tmp | CEIL(120, ns); /* W0 = 120nS */
+ W_REG(&eir->prog_waitcount, tmp); /* 0x01020a0c for a 100Mhz clock */
+ } else if ((cc = sb_setcore(sbh, SB_CC, 0))) {
-+
+//==================================tallest===============================================
+ /* set register for external IO to control LED. */
-+ W_REG(&cc->prog_config, 0x11);
-+ tmp = CEIL(10, ns) << FW_W3_SHIFT; /* W3 = 10nS */
-+ tmp = tmp | (CEIL(40, ns) << FW_W1_SHIFT); /* W1 = 40nS */
-+ tmp = tmp | CEIL(240, ns); /* W0 = 120nS */
-+ W_REG(&cc->prog_waitcount, tmp); /* 0x01020a0c for a 100Mhz clock */
++ W_REG(&cc->prog_config, 0x11);
++ tmp = CEIL(10, ns) << FW_W3_SHIFT; /* W3 = 10nS */
++ tmp = tmp | (CEIL(40, ns) << FW_W1_SHIFT); /* W1 = 40nS */
++ tmp = tmp | CEIL(240, ns); /* W0 = 120nS */
++ W_REG(&cc->prog_waitcount, tmp); /* 0x01020a0c for a 100Mhz clock */
+//========================================================================================
+ /* Set timing for the flash */
+ tmp = CEIL(10, ns) << FW_W3_SHIFT; /* W3 = 10nS */
+ W_REG(&cc->pcmcia_memwait, tmp);
+ }
+ }
-+
++
+ // Added by Chen-I & Yen for enabling 5350 EXTIF
+ if (BCMINIT(sb_chip)(sbh) == BCM5350_DEVICE_ID)
+ {
+ if (config & MEMC_CONFIG_DDR) {
+ ret = (wr << 16) | (rd << 8) | dqsg;
+ } else {
-+ if ( (rev > 0) || (sb_chip(sbh) == BCM5365_DEVICE_ID))
-+
++ if ((rev > 0) || (sb_chip(sbh) == BCM5365_DEVICE_ID))
+ cd = rd;
+ else
+ cd = (rd == MEMC_CD_THRESHOLD) ? rd : (wr + MEMC_CD_THRESHOLD);
include $(TOPDIR)/Rules.make
diff -urN linux.old/drivers/char/serial.c linux.dev/drivers/char/serial.c
--- linux.old/drivers/char/serial.c 2005-08-26 13:41:41.952594192 +0200
-+++ linux.dev/drivers/char/serial.c 2005-08-26 13:44:34.340387264 +0200
++++ linux.dev/drivers/char/serial.c 2005-09-01 02:33:38.312794792 +0200
@@ -444,6 +444,10 @@
return inb(info->port+1);
#endif
break;
default:
outb(value, info->port+offset);
+@@ -1728,7 +1735,7 @@
+ /* Special case since 134 is really 134.5 */
+ quot = (2*baud_base / 269);
+ else if (baud)
+- quot = baud_base / baud;
++ quot = (baud_base + (baud / 2)) / baud;
+ }
+ /* If the quotient is zero refuse the change */
+ if (!quot && old_termios) {
+@@ -1745,12 +1752,12 @@
+ /* Special case since 134 is really 134.5 */
+ quot = (2*baud_base / 269);
+ else if (baud)
+- quot = baud_base / baud;
++ quot = (baud_base + (baud / 2)) / baud;
+ }
+ }
+ /* As a last resort, if the quotient is zero, default to 9600 bps */
+ if (!quot)
+- quot = baud_base / 9600;
++ quot = (baud_base + 4800) / 9600;
+ /*
+ * Work around a bug in the Oxford Semiconductor 952 rev B
+ * chip which causes it to seriously miscalculate baud rates
@@ -5996,6 +6003,13 @@
* Divisor, bytesize and parity
*/
if (doflow)
state->flags |= ASYNC_CONS_FLOW;
info = &async_sercons;
+@@ -6009,7 +6023,7 @@
+ info->io_type = state->io_type;
+ info->iomem_base = state->iomem_base;
+ info->iomem_reg_shift = state->iomem_reg_shift;
+- quot = state->baud_base / baud;
++ quot = (state->baud_base + (baud / 2)) / baud;
+ cval = cflag & (CSIZE | CSTOPB);
+ #if defined(__powerpc__) || defined(__alpha__)
+ cval >>= 8;
diff -urN linux.old/drivers/mtd/maps/Config.in linux.dev/drivers/mtd/maps/Config.in
--- linux.old/drivers/mtd/maps/Config.in 2005-08-26 13:41:41.963592520 +0200
+++ linux.dev/drivers/mtd/maps/Config.in 2005-08-26 13:44:34.345386504 +0200
+#endif /* BINOSL */
diff -urN linux.old/drivers/net/hnd/sbutils.c linux.dev/drivers/net/hnd/sbutils.c
--- linux.old/drivers/net/hnd/sbutils.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux.dev/drivers/net/hnd/sbutils.c 2005-08-27 03:11:17.525240184 +0200
-@@ -0,0 +1,2064 @@
++++ linux.dev/drivers/net/hnd/sbutils.c 2005-09-01 01:33:48.212447040 +0200
+@@ -0,0 +1,2061 @@
+/*
+ * Misc utility routines for accessing chip-specific features
+ * of the SiliconBackplane-based Broadcom chips.
+ * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
+ * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
-+ * $Id$
++ * $Id: sbutils.c,v 1.6 2005/03/07 08:35:32 kanki Exp $
+ */
+
+#include <typedefs.h>
+#define SB_ERROR(args)
+
+
-+#define CLOCK_BASE_5350 12500000 /* Specific to 5350*/
-+
+typedef uint32 (*sb_intrsoff_t)(void *intr_arg);
+typedef void (*sb_intrsrestore_t)(void *intr_arg, uint32 arg);
+typedef bool (*sb_intrsenabled_t)(void *intr_arg);
+ n = R_REG(&cc->clockcontrol_n);
+ if (pll_type == PLL_TYPE6)
+ m = R_REG(&cc->clockcontrol_mips);
-+ else if (pll_type == PLL_TYPE3)
-+ {
-+ // Added by Chen-I for 5365
-+ if (BCMINIT(sb_chip)(sbh) == BCM5365_DEVICE_ID)
-+ m = R_REG(&cc->clockcontrol_sb);
-+ else m = R_REG(&cc->clockcontrol_m2);
-+ }
++ else if ((pll_type == PLL_TYPE3) && (BCMINIT(sb_chip)(sbh) != BCM5365_DEVICE_ID))
++ m = R_REG(&cc->clockcontrol_m2);
+ else
+ m = R_REG(&cc->clockcontrol_sb);
+ } else {
+ return 0;
+ }
+
-+ /* calculate rate */
-+ rate = sb_clock_rate(pll_type, n, m);
++ if (BCMINIT(sb_chip)(sbh) == BCM5365_DEVICE_ID) {
++ rate = 100000000;
++ } else {
++ /* calculate rate */
++ rate = sb_clock_rate(pll_type, n, m);
++ if (pll_type == PLL_TYPE3)
++ rate = rate / 2;
++ }
+
-+ if (pll_type == PLL_TYPE3)
-+ rate = rate / 2;
+
+ /* switch back to previous core */
+ sb_setcoreidx(sbh, idx);
projects / openwrt.git / blobdiff