atheros: add kernel 2.6.35 preliminary support

[openwrt.git] / target / linux / brcm47xx / patches-2.6.32 / 700-ssb-gigabit-ethernet-driver.patch

diff --git a/target/linux/brcm47xx/patches-2.6.32/700-ssb-gigabit-ethernet-driver.patch b/target/linux/brcm47xx/patches-2.6.32/700-ssb-gigabit-ethernet-driver.patch
index de25019..5793249 100644 (file)
--- a/target/linux/brcm47xx/patches-2.6.32/700-ssb-gigabit-ethernet-driver.patch
+++ b/target/linux/brcm47xx/patches-2.6.32/700-ssb-gigabit-ethernet-driver.patch
@@ -102,7 +102,7 @@
                tg3_readphy(tp, MII_BMSR, &tmp);
                if (!tg3_readphy(tp, MII_BMSR, &tmp) &&
                    (tmp & BMSR_LSTATUS))
-@@ -6264,6 +6289,11 @@ static int tg3_poll_fw(struct tg3 *tp)
+@@ -6273,6 +6298,11 @@ static int tg3_poll_fw(struct tg3 *tp)
        int i;
        u32 val;
  
@@ -114,7 +114,7 @@
        if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) {
                /* Wait up to 20ms for init done. */
                for (i = 0; i < 200; i++) {
-@@ -6541,6 +6571,14 @@ static int tg3_chip_reset(struct tg3 *tp
+@@ -6550,6 +6580,14 @@ static int tg3_chip_reset(struct tg3 *tp
                tw32(0x5000, 0x400);
        }
  
@@ -129,7 +129,7 @@
        tw32(GRC_MODE, tp->grc_mode);
  
        if (tp->pci_chip_rev_id == CHIPREV_ID_5705_A0) {
-@@ -6695,9 +6733,12 @@ static int tg3_halt_cpu(struct tg3 *tp, 
+@@ -6704,9 +6742,12 @@ static int tg3_halt_cpu(struct tg3 *tp, 
                return -ENODEV;
        }
  
@@ -145,7 +145,7 @@
        return 0;
  }
  
-@@ -6760,6 +6801,11 @@ static int tg3_load_5701_a0_firmware_fix
+@@ -6769,6 +6810,11 @@ static int tg3_load_5701_a0_firmware_fix
        const __be32 *fw_data;
        int err, i;
  
@@ -157,7 +157,7 @@
        fw_data = (void *)tp->fw->data;
  
        /* Firmware blob starts with version numbers, followed by
-@@ -6819,6 +6865,11 @@ static int tg3_load_tso_firmware(struct 
+@@ -6828,6 +6874,11 @@ static int tg3_load_tso_firmware(struct 
        unsigned long cpu_base, cpu_scratch_base, cpu_scratch_size;
        int err, i;
  
@@ -169,7 +169,7 @@
        if (tp->tg3_flags2 & TG3_FLG2_HW_TSO)
                return 0;
  
-@@ -7906,6 +7957,11 @@ static void tg3_timer(unsigned long __op
+@@ -7915,6 +7966,11 @@ static void tg3_timer(unsigned long __op
  
        spin_lock(&tp->lock);
  
@@ -181,7 +181,7 @@
        if (!(tp->tg3_flags & TG3_FLAG_TAGGED_STATUS)) {
                /* All of this garbage is because when using non-tagged
                 * IRQ status the mailbox/status_block protocol the chip
-@@ -9791,6 +9847,11 @@ static int tg3_test_nvram(struct tg3 *tp
+@@ -9801,6 +9857,11 @@ static int tg3_test_nvram(struct tg3 *tp
        if (tp->tg3_flags3 & TG3_FLG3_NO_NVRAM)
                return 0;
  
@@ -193,7 +193,7 @@
        if (tg3_nvram_read(tp, 0, &magic) != 0)
                return -EIO;
  
-@@ -10585,7 +10646,7 @@ static int tg3_ioctl(struct net_device *
+@@ -10595,7 +10656,7 @@ static int tg3_ioctl(struct net_device *
                        return -EAGAIN;
  
                spin_lock_bh(&tp->lock);
@@ -202,7 +202,7 @@
                spin_unlock_bh(&tp->lock);
  
                data->val_out = mii_regval;
-@@ -10601,7 +10662,7 @@ static int tg3_ioctl(struct net_device *
+@@ -10611,7 +10672,7 @@ static int tg3_ioctl(struct net_device *
                        return -EAGAIN;
  
                spin_lock_bh(&tp->lock);
@@ -211,7 +211,7 @@
                spin_unlock_bh(&tp->lock);
  
                return err;
-@@ -11246,6 +11307,12 @@ static void __devinit tg3_get_5717_nvram
+@@ -11256,6 +11317,12 @@ static void __devinit tg3_get_5717_nvram
  /* Chips other than 5700/5701 use the NVRAM for fetching info. */
  static void __devinit tg3_nvram_init(struct tg3 *tp)
  {
@@ -224,7 +224,7 @@
        tw32_f(GRC_EEPROM_ADDR,
             (EEPROM_ADDR_FSM_RESET |
              (EEPROM_DEFAULT_CLOCK_PERIOD <<
-@@ -11506,6 +11573,9 @@ static int tg3_nvram_write_block(struct 
+@@ -11516,6 +11583,9 @@ static int tg3_nvram_write_block(struct 
  {
        int ret;
  
@@ -234,7 +234,7 @@
        if (tp->tg3_flags & TG3_FLAG_EEPROM_WRITE_PROT) {
                tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl &
                       ~GRC_LCLCTRL_GPIO_OUTPUT1);
-@@ -12788,6 +12858,11 @@ static int __devinit tg3_get_invariants(
+@@ -12801,6 +12871,11 @@ static int __devinit tg3_get_invariants(
              GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701)))
                tp->tg3_flags |= TG3_FLAG_SRAM_USE_CONFIG;
  
@@ -246,7 +246,7 @@
        /* Get eeprom hw config before calling tg3_set_power_state().
         * In particular, the TG3_FLG2_IS_NIC flag must be
         * determined before calling tg3_set_power_state() so that
-@@ -13177,6 +13252,10 @@ static int __devinit tg3_get_device_addr
+@@ -13190,6 +13265,10 @@ static int __devinit tg3_get_device_addr
        }
  
        if (!is_valid_ether_addr(&dev->dev_addr[0])) {
@@ -257,7 +257,7 @@
  #ifdef CONFIG_SPARC
                if (!tg3_get_default_macaddr_sparc(tp))
                        return 0;
-@@ -13669,6 +13748,7 @@ static char * __devinit tg3_phy_string(s
+@@ -13682,6 +13761,7 @@ static char * __devinit tg3_phy_string(s
        case PHY_ID_BCM5704:    return "5704";
        case PHY_ID_BCM5705:    return "5705";
        case PHY_ID_BCM5750:    return "5750";
@@ -265,7 +265,7 @@
        case PHY_ID_BCM5752:    return "5752";
        case PHY_ID_BCM5714:    return "5714";
        case PHY_ID_BCM5780:    return "5780";
-@@ -13880,6 +13960,13 @@ static int __devinit tg3_init_one(struct
+@@ -13893,6 +13973,13 @@ static int __devinit tg3_init_one(struct
                tp->msg_enable = tg3_debug;
        else
                tp->msg_enable = TG3_DEF_MSG_ENABLE;
@@ -291,7 +291,7 @@
  
  #define NIC_SRAM_RX_MINI_BUFFER_DESC  0x00001000
  
-@@ -2821,6 +2824,7 @@ struct tg3 {
+@@ -2824,6 +2827,7 @@ struct tg3 {
  #define PHY_ID_BCM5714                        0x60008340
  #define PHY_ID_BCM5780                        0x60008350
  #define PHY_ID_BCM5755                        0xbc050cc0
@@ -299,7 +299,7 @@
  #define PHY_ID_BCM5787                        0xbc050ce0
  #define PHY_ID_BCM5756                        0xbc050ed0
  #define PHY_ID_BCM5784                        0xbc050fa0
-@@ -2865,7 +2869,7 @@ struct tg3 {
+@@ -2868,7 +2872,7 @@ struct tg3 {
         (X) == PHY_ID_BCM5780 || (X) == PHY_ID_BCM5787 || \
         (X) == PHY_ID_BCM5755 || (X) == PHY_ID_BCM5756 || \
         (X) == PHY_ID_BCM5906 || (X) == PHY_ID_BCM5761 || \