+
+static struct plat_serial8250_port cambria_optional_uart_data[] = {
+ {
-+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
++ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_BUGGY_UART,
+ .iotype = UPIO_MEM,
+ .regshift = 0,
+ .uartclk = 1843200,
+ },
+ {
-+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
++ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_BUGGY_UART,
+ .iotype = UPIO_MEM,
+ .regshift = 0,
+ .uartclk = 1843200,
static void __init cambria_gw2350_setup(void)
{
+ *IXP4XX_EXP_CS2 = 0xbfff0003;
-+ set_irq_type(IRQ_IXP4XX_GPIO3, IRQT_BOTHEDGE);
-+ cambria_optional_uart_data[0].mapbase = IXP4XX_EXP_BUS_BASE(2);
-+ cambria_optional_uart_data[0].membase = (void __iomem *)ioremap(IXP4XX_EXP_BUS_BASE(2), 0x0fff);
++ set_irq_type(IRQ_IXP4XX_GPIO3, IRQT_RISING);
++ cambria_optional_uart_data[0].mapbase = 0x52FF0000;
++ cambria_optional_uart_data[0].membase = (void __iomem *)ioremap(0x52FF0000, 0x0fff);
+ cambria_optional_uart_data[0].irq = IRQ_IXP4XX_GPIO3;
+
+ *IXP4XX_EXP_CS3 = 0xbfff0003;
-+ set_irq_type(IRQ_IXP4XX_GPIO4, IRQT_BOTHEDGE);
-+ cambria_optional_uart_data[1].mapbase = IXP4XX_EXP_BUS_BASE(3);
-+ cambria_optional_uart_data[1].membase = (void __iomem *)ioremap(IXP4XX_EXP_BUS_BASE(3), 0x0fff);
++ set_irq_type(IRQ_IXP4XX_GPIO4, IRQT_RISING);
++ cambria_optional_uart_data[1].mapbase = 0x53FF0000;
++ cambria_optional_uart_data[1].membase = (void __iomem *)ioremap(0x53FF0000, 0x0fff);
+ cambria_optional_uart_data[1].irq = IRQ_IXP4XX_GPIO4;
+
+ platform_device_register(&cambria_optional_uart);
platform_device_register(&cambria_npec_device);
platform_device_register(&cambria_npea_device);
-@@ -298,6 +349,22 @@
+@@ -294,10 +345,26 @@
+ platform_device_register(&cambria_usb1_device);
+
+ platform_device_register(&cambria_gpio_leds_device);
++
++ *IXP4XX_EXP_CS2 = 0xBFFF3C43;
++ *IXP4XX_EXP_CS3 = 0xBFFF3C43;
+ }
static void __init cambria_gw2358_setup(void)
{
+ *IXP4XX_EXP_CS3 = 0xbfff0003;
-+ set_irq_type(IRQ_IXP4XX_GPIO3, IRQT_BOTHEDGE);
++ set_irq_type(IRQ_IXP4XX_GPIO3, IRQT_RISING);
+ cambria_optional_uart_data[0].mapbase = 0x53FC0000;
+ cambria_optional_uart_data[0].membase = (void __iomem *)ioremap(0x53FC0000, 0x0fff);
+ cambria_optional_uart_data[0].irq = IRQ_IXP4XX_GPIO3;
+
-+ *IXP4XX_EXP_CS3 = 0xbfff0003;
-+ set_irq_type(IRQ_IXP4XX_GPIO4, IRQT_BOTHEDGE);
++ set_irq_type(IRQ_IXP4XX_GPIO4, IRQT_RISING);
+ cambria_optional_uart_data[1].mapbase = 0x53F80000;
+ cambria_optional_uart_data[1].membase = (void __iomem *)ioremap(0x53F80000, 0x0fff);
+ cambria_optional_uart_data[1].irq = IRQ_IXP4XX_GPIO4;
+
+ platform_device_register(&cambria_optional_uart);
+
-+ cambria_npec_data.phy = 2;
-+ cambria_npea_data.phy = 1;
platform_device_register(&cambria_npec_device);
platform_device_register(&cambria_npea_device);