-+ * 1. Since the core supports both ehci and EHCI functions, it must
-+ * only be reset once.
-+ *
-+ * 2. In addition to the standard SSB reset sequence, the Host Control
-+ * Register must be programmed to bring the USB core and various
-+ * phy components out of reset.
++ * In addition to the standard SSB reset sequence, the Host Control
++ * Register must be programmed to bring the USB core and various phy
++ * components out of reset.