-+ max_low_pfn = max_pfn;
-+
-+ /*
-+ * Partially used pages are not usable - thus we are
-+ * rounding upwards:
-+ */
-+
-+ start_pfn = PFN_UP(__pa(&_end));
-+
-+ /*
-+ * Find a proper area for the bootmem bitmap. After this
-+ * bootstrap step all allocations (until the page allocator is
-+ * intact) must be done via bootmem_alloc().
-+ */
-+
-+ bootmap_size = init_bootmem_node(NODE_DATA(0), start_pfn,
-+ __MEMORY_START>>PAGE_SHIFT, max_low_pfn);
-+
-+
-+ /*
-+ * Register fully available low RAM pages with the bootmem allocator.
-+ */
-+
-+ {
-+ unsigned long curr_pfn, last_pfn, pages;
-+
-+ /*
-+ * We are rounding up the start address of usable memory:
-+ */
-+ curr_pfn = PFN_UP(__MEMORY_START);
-+
-+ /*
-+ * ... and at the end of the usable range downwards:
-+ */
-+ last_pfn = PFN_DOWN(__pa(memory_end));
-+
-+ if (last_pfn > max_low_pfn)
-+ last_pfn = max_low_pfn;
-+
-+ pages = last_pfn - curr_pfn;
-+
-+
-+ free_bootmem_node(NODE_DATA(0), PFN_PHYS(curr_pfn),
-+ PFN_PHYS(pages));
-+ }
-+
-+ /*
-+ * Reserve the kernel text and
-+ * Reserve the bootmem bitmap. We do this in two steps (first step
-+ * was init_bootmem()), because this catches the (definitely buggy)
-+ * case of us accidentally initializing the bootmem allocator with
-+ * an invalid RAM area.
-+ */
-+ reserve_bootmem_node(NODE_DATA(0), __MEMORY_START+PAGE_SIZE,
-+ (PFN_PHYS(start_pfn)+bootmap_size+PAGE_SIZE-1)-__MEMORY_START);
-+
-+ /*
-+ * reserve physical page 0 - it's a special BIOS page on many boxes,
-+ * enabling clean reboots, SMP operation, laptop functions.
-+ */
-+ reserve_bootmem_node(NODE_DATA(0), __MEMORY_START, PAGE_SIZE);
-+}
-+
-+extern char __init_begin, __init_end;
-+
-+void free_initmem(void)
-+{
-+ unsigned long addr;
-+ // prom_free_prom_memory ();
-+
-+ addr = (unsigned long) &__init_begin;
-+ while (addr < (unsigned long) &__init_end) {
-+ ClearPageReserved(virt_to_page(addr));
-+ set_page_count(virt_to_page(addr), 1);
-+ free_page(addr);
-+ totalram_pages++;
-+ addr += PAGE_SIZE;
-+ }
-+ printk("Freeing unused kernel memory: %dk freed\n",
-+ (&__init_end - &__init_begin) >> 10);
-+}
-+
-+void si_meminfo(struct sysinfo *val)
-+{
-+ val->totalram = totalram_pages;
-+ val->sharedram = 0;
-+ val->freeram = nr_free_pages();
-+ val->bufferram = atomic_read(&buffermem_pages);
-+ val->totalhigh = 0;
-+ val->freehigh = nr_free_highpages();
-+ val->mem_unit = PAGE_SIZE;
-+
-+ return;
-+}
-diff -urN kernel-base/arch/mips/ar7/ar7/gpio.c kernel-current/arch/mips/ar7/ar7/gpio.c
---- kernel-base/arch/mips/ar7/ar7/gpio.c 1970-01-01 01:00:00.000000000 +0100
-+++ kernel-current/arch/mips/ar7/ar7/gpio.c 2005-07-10 09:46:52.164776456 +0200
-@@ -0,0 +1,132 @@
-+#include <linux/kernel.h>
-+#include <asm/uaccess.h>
-+#include <linux/spinlock.h>
-+#include <linux/proc_fs.h>
-+#include <linux/fs.h>
-+#include <linux/timer.h>
-+#include <linux/module.h>
-+#include <linux/stddef.h>
-+
-+#include <asm/ar7/tnetd73xx_err.h>
-+#include <asm/ar7/tnetd73xx_misc.h>
-+#include <asm/ar7/ledapp.h>
-+
-+
-+#if defined (CONFIG_AR7RD) || defined(CONFIG_AR7WRD)
-+
-+#define AR7_RESET_FILE "led_mod/ar7reset"
-+#define AR7_RESET_GPIO 11
-+#define RESET_POLL_TIME 1
-+#define RESET_HOLD_TIME 4
-+#define NO_OF_LEDS
-+#define TRUE 1
-+#define FALSE 0
-+
-+static struct proc_dir_entry *reset_file;
-+static int res_state = 0;
-+static int count;
-+static struct timer_list *pTimer = NULL;
-+static ssize_t proc_read_reset_fops(struct file *filp, char *buf, size_t count, loff_t * offp);
-+
-+struct file_operations reset_fops = {
-+ read:proc_read_reset_fops
-+};
-+
-+#endif
-+
-+static spinlock_t device_lock;
-+led_reg_t temp[15];
-+
-+static void gpio_led_on(unsigned long param)
-+{
-+ unsigned int flags;
-+
-+ spin_lock_irqsave(&device_lock, flags);
-+ tnetd73xx_gpio_out(param, FALSE);
-+ spin_unlock_irqrestore(&device_lock, flags);
-+}
-+
-+static void gpio_led_off(unsigned long param)
-+{
-+ unsigned int flags = 0x00;
-+
-+ spin_lock_irqsave(&device_lock, flags);
-+ tnetd73xx_gpio_out(param, TRUE);
-+ spin_unlock_irqrestore(&device_lock, flags);
-+}
-+
-+static void gpio_led_init(unsigned long param)
-+{
-+ tnetd73xx_gpio_ctrl(param, GPIO_PIN, GPIO_OUTPUT_PIN);
-+}
-+
-+static void board_gpio_reset(void)
-+{
-+ tnetd73xx_gpio_init();
-+
-+ /* Initialize the link mask */
-+ device_lock = SPIN_LOCK_UNLOCKED;
-+ return;
-+}
-+
-+#if defined(CONFIG_AR7WRD)
-+
-+static ssize_t proc_read_reset_fops(struct file *filp, char *buf, size_t count, loff_t * offp)
-+{
-+ char *pdata = NULL;
-+ char line[3];
-+ int len = 0;
-+ if (*offp != 0)
-+ return 0;
-+
-+ pdata = buf;
-+ len = sprintf(line, "%d\n", res_state);
-+ res_state = 0;
-+ copy_to_user(buf, line, len);
-+ *offp = len;
-+ return len;
-+}
-+
-+static void reset_timer_func(unsigned long data)
-+{
-+ count = (tnetd73xx_gpio_in(AR7_RESET_GPIO) == 0) ? count + 1 : 0;
-+ if (count >= RESET_HOLD_TIME / RESET_POLL_TIME)
-+ res_state = 1;
-+ pTimer->expires = jiffies + HZ * RESET_POLL_TIME;
-+ add_timer(pTimer);
-+ return;
-+}
-+
-+static void reset_init(void)
-+{
-+ /* Create board reset proc file */
-+ reset_file = create_proc_entry(AR7_RESET_FILE, 0777, NULL);
-+ if (reset_file == NULL)
-+ goto reset_file;
-+ reset_file->owner = THIS_MODULE;
-+ reset_file->proc_fops = &reset_fops;
-+
-+ /* Initialise GPIO 11 for input */
-+ tnetd73xx_gpio_ctrl(AR7_RESET_GPIO, GPIO_PIN, GPIO_INPUT_PIN);
-+
-+ /* Create a timer which fires every seconds */
-+ pTimer = kmalloc(sizeof(struct timer_list), GFP_KERNEL);
-+ init_timer(pTimer);
-+ pTimer->function = reset_timer_func;
-+ pTimer->data = 0;
-+ /* Start the timer */
-+ reset_timer_func(0);
-+ return;
-+
-+ reset_file:
-+ remove_proc_entry(AR7_RESET_FILE, NULL);
-+ return;
-+}
-+#endif
-+
-+
-+void board_gpio_init(void)
-+{
-+ board_gpio_reset();
-+ return;
-+}
-diff -urN kernel-base/arch/mips/ar7/ar7/ledmod.c kernel-current/arch/mips/ar7/ar7/ledmod.c
---- kernel-base/arch/mips/ar7/ar7/ledmod.c 1970-01-01 01:00:00.000000000 +0100
-+++ kernel-current/arch/mips/ar7/ar7/ledmod.c 2005-07-10 09:45:36.692250024 +0200
-@@ -0,0 +1,712 @@
-+#include <linux/config.h>
-+#include <linux/init.h>
-+#include <linux/kernel.h>
-+#include <linux/proc_fs.h>
-+#include <asm/uaccess.h>
-+#include <linux/fs.h>
-+#include <linux/timer.h>
-+#include <linux/delay.h>
-+#include <linux/spinlock.h>
-+#include <asm/ar7/avalanche_regs.h>
-+#include <asm/ar7/ledapp.h>
-+#include <linux/module.h>
-+
-+#define LED_ON 1
-+#define LED_OFF 2
-+#define LED_BLINK 3
-+#define LED_FLASH 4
-+
-+#define LED_BLINK_UP 5
-+#define LED_BLINK_DOWN 6
-+
-+typedef struct state_entry {
-+ unsigned char mode;
-+ unsigned char led;
-+ void (*handler) (struct state_entry * pState);
-+ unsigned long param;
-+} state_entry_t;
-+
-+typedef struct mod_entry {
-+ state_entry_t *states[MAX_STATE_ID];
-+} mod_entry_t;
-+
-+static mod_entry_t *modArr[MAX_MOD_ID];
-+static struct proc_dir_entry *led_proc_dir, *led_file;
-+
-+/* index of the array is the led number HARDWARE SPECIFIC*/
-+typedef struct led_data {
-+ led_reg_t *led;
-+ int state;
-+ struct timer_list *pTimer;
-+ unsigned char timer_running;
-+ unsigned long param;
-+} led_data_t;
-+
-+led_data_t led_arr[MAX_LED_ID + 1];
-+/*!!! The last device is actually being used for ar7 reset to factory default */
-+#if 1
-+/* Ron add for adsl LED blink */
-+#define GPIO_ADSL_ACT (1<<6)
-+#define GPIO_ADSL_DOWN (1<<8)
-+#define BLINK_FAST 5*HZ/100
-+#define BLINK_SLOW 15*HZ/100
-+static struct timer_list my_led_timer;
-+static int my_blink_count = 0;
-+static int my_mode = 1;
-+void led_operation(int mod, int state);
-+
-+static void my_led_on(unsigned long gpio, int logic)
-+{
-+ if (logic > 0)
-+ GPIO_DATA_OUTPUT |= gpio;
-+ else
-+ GPIO_DATA_OUTPUT &= ~gpio;
-+
-+}
-+static void my_led_off(unsigned long gpio, int logic)
-+{
-+ if (logic > 0)
-+ GPIO_DATA_OUTPUT &= ~gpio;
-+ else
-+ GPIO_DATA_OUTPUT |= gpio;
-+
-+}
-+
-+static void my_led_init(unsigned long gpio, int init, int logic)
-+{
-+ GPIO_DATA_ENABLE |= gpio;
-+ GPIO_DATA_DIR &= ~gpio;
-+ if (init)
-+ my_led_on(gpio, logic);
-+ else
-+ my_led_off(gpio, logic);
-+}
-+
-+static void my_led_blink_timer(unsigned long data)
-+{
-+ unsigned long gpio = GPIO_ADSL_ACT;
-+ unsigned int speed = BLINK_FAST;
-+ if (my_mode == 2) {
-+ gpio = GPIO_ADSL_DOWN;
-+ speed = BLINK_SLOW;
-+ }
-+ if (my_blink_count) {
-+ if (GPIO_DATA_OUTPUT & gpio) {
-+ GPIO_DATA_OUTPUT &= ~gpio;
-+ if (my_mode != 2)
-+ my_blink_count = 0;
-+ } else {
-+ GPIO_DATA_OUTPUT |= gpio;
-+ }
-+ }
-+ my_led_timer.expires = jiffies + speed;
-+ add_timer(&my_led_timer);
-+}
-+
-+/* Ron add for ADSL led blink */
-+#endif
-+static spinlock_t config_lock;
-+
-+static void board_led_link_up(state_entry_t * pState);
-+static void board_led_link_down(state_entry_t * pState);
-+static void board_led_activity_on(state_entry_t * pState);
-+static void board_led_activity_off(state_entry_t * pState);
-+static void led_timer_func(unsigned long data);
-+
-+extern void board_gpio_init(void);
-+extern void uart_led_init(void);
-+
-+static ssize_t proc_read_led_fops(struct file *filp, char *buf, size_t count, loff_t * offp);
-+static ssize_t proc_write_led_fops(struct file *filp, const char *buffer, size_t count, loff_t * offp);
-+static int config_led(unsigned long y);
-+
-+struct file_operations led_fops = {
-+ read:proc_read_led_fops,
-+ write:proc_write_led_fops,
-+};
-+
-+static int led_atoi(char *name)
-+{
-+ int val = 0;
-+ for (;; name++) {
-+ switch (*name) {
-+ case '0'...'9':
-+ val = val * 10 + (*name - '0');
-+ break;
-+ default:
-+ return val;
-+ }
-+ }
-+}
-+
-+static int free_memory(void)
-+{
-+ int i, j;
-+
-+ for (i = 0; i < MAX_MOD_ID; i++) {
-+ if (modArr[i] != NULL) {
-+ for (j = 0; j < MAX_STATE_ID; j++) {
-+ if (modArr[i]->states[j] != NULL)
-+ kfree(modArr[i]->states[j]);
-+ }
-+ kfree(modArr[i]);
-+ modArr[i] = NULL;
-+ }
-+ }
-+ return 0;
-+}
-+
-+static int led_on(state_entry_t * pState)
-+{
-+ if (led_arr[pState->led].led == NULL)
-+ return -1;
-+ led_arr[pState->led].led->onfunc(led_arr[pState->led].led->param);
-+ return 0;
-+}
-+
-+static int led_off(state_entry_t * pState)
-+{
-+ if (led_arr[pState->led].led == NULL)
-+ return -1;
-+ led_arr[pState->led].led->offfunc(led_arr[pState->led].led->param);
-+ return 0;
-+}
-+
-+static void board_led_link_up(state_entry_t * pState)
-+{
-+ led_arr[pState->led].state = LED_ON;
-+ if (led_arr[pState->led].timer_running == 0)
-+ led_on(pState);
-+ return;
-+}
-+
-+static void board_led_link_down(state_entry_t * pState)
-+{
-+ led_arr[pState->led].state = LED_OFF;
-+ if (led_arr[pState->led].timer_running == 0)
-+ led_off(pState);
-+ return;
-+}
-+
-+static void add_led_timer(state_entry_t * pState)
-+{
-+ led_arr[pState->led].pTimer->expires =
-+ jiffies + HZ * (pState->param) / 1000;
-+ led_arr[pState->led].param = pState->param;
-+ led_arr[pState->led].pTimer->data = pState;
-+ add_timer(led_arr[pState->led].pTimer);
-+}
-+
-+static void board_led_activity_on(state_entry_t * pState)
-+{
-+ if (led_arr[pState->led].timer_running == 0) {
-+ led_on(pState);
-+ add_led_timer(pState);
-+ led_arr[pState->led].timer_running = 1;
-+ led_arr[pState->led].state = LED_BLINK_UP;
-+ } else if (led_arr[pState->led].timer_running > 0xF0) {
-+ led_arr[pState->led].state = LED_BLINK_UP;
-+ led_arr[pState->led].pTimer->expires =
-+ jiffies + HZ * (pState->param) / 1000;
-+ led_arr[pState->led].param = pState->param;
-+ led_arr[pState->led].pTimer->data = pState;
-+ }
-+ return;
-+}
-+
-+static void board_led_activity_off(state_entry_t * pState)
-+{
-+ if (led_arr[pState->led].timer_running == 0) {
-+ led_off(pState);
-+ add_led_timer(pState);
-+ led_arr[pState->led].timer_running = 1;
-+ led_arr[pState->led].state = LED_BLINK_UP;
-+ } else if (led_arr[pState->led].timer_running > 0xF0) {
-+ led_arr[pState->led].state = LED_BLINK_UP;
-+ led_arr[pState->led].pTimer->expires =
-+ jiffies + HZ * (pState->param) / 1000;
-+ led_arr[pState->led].param = pState->param;
-+ led_arr[pState->led].pTimer->data = pState;
-+ }
-+ return;
-+}
-+
-+static void board_led_link_flash(state_entry_t * pState)
-+{
-+ if (led_on(pState))
-+ return;
-+ if (led_arr[pState->led].timer_running == 0)
-+ add_led_timer(pState);
-+ else
-+ led_arr[pState->led].param = pState->param;
-+ led_arr[pState->led].timer_running = 0xFF;
-+ led_arr[pState->led].state = LED_FLASH;
-+ return;
-+}
-+
-+static void led_timer_func(unsigned long data)
-+{
-+ state_entry_t *pState = NULL;
-+ mod_entry_t *pMod = NULL;
-+ unsigned int flags;
-+
-+ spin_lock_irqsave(&config_lock, flags);
-+
-+ pState = (state_entry_t *) data;
-+
-+ if (led_arr[pState->led].state == LED_BLINK_DOWN) {
-+ led_arr[pState->led].timer_running = 0;
-+ if (pState->mode == 2)
-+ led_arr[pState->led].state = LED_OFF;
-+ else
-+ led_arr[pState->led].state = LED_ON;
-+ } else if (led_arr[pState->led].state == LED_BLINK_UP) {
-+ led_arr[pState->led].pTimer->expires =
-+ jiffies + HZ * (led_arr[pState->led].param) / 1000;
-+ led_arr[pState->led].pTimer->data = pState;
-+ add_timer(led_arr[pState->led].pTimer);
-+ if (pState->mode == 2) {
-+ led_off(pState);
-+ led_arr[pState->led].state = LED_BLINK_DOWN;
-+ } else {
-+ led_on(pState);
-+ led_arr[pState->led].state = LED_BLINK_DOWN;
-+ }
-+ led_arr[pState->led].timer_running = 1;
-+ } else if (led_arr[pState->led].state == LED_FLASH) {
-+ led_arr[pState->led].pTimer->expires =
-+ jiffies + HZ * (led_arr[pState->led].param) / 1000;
-+ led_arr[pState->led].pTimer->data = pState;
-+ add_timer(led_arr[pState->led].pTimer);
-+
-+ if (led_arr[pState->led].timer_running == 0xFF) {
-+ led_off(pState);
-+ led_arr[pState->led].timer_running--;
-+ } else {
-+ led_on(pState);
-+ led_arr[pState->led].timer_running++;
-+ }
-+ spin_unlock_irqrestore(&config_lock, flags);
-+ return;
-+ } else if (led_arr[pState->led].state == LED_OFF) {
-+ led_off(pState);
-+ led_arr[pState->led].timer_running = 0;
-+ } else if (led_arr[pState->led].state == LED_ON) {
-+ led_on(pState);
-+ led_arr[pState->led].timer_running = 0;
-+ }
-+ spin_unlock_irqrestore(&config_lock, flags);
-+ return;
-+}
-+
-+static ssize_t proc_read_led_fops(struct file *filp,
-+ char *buf, size_t count, loff_t * offp)
-+{
-+ char *pdata = NULL;
-+ int i = 0, j = 0, len = 0, totallen = 0;
-+ char line[255];
-+
-+ if (*offp != 0)
-+ return 0;
-+
-+ pdata = buf;
-+ len += sprintf(line, "LEDS Registered for use are:");
-+ for (i = 0; i < MAX_LED_ID; i++)
-+ if (led_arr[i].led != NULL)
-+ len += sprintf(&line[len], " %d ", i);
-+ line[len++] = '\n';
-+
-+ copy_to_user(pdata, line, len);
-+ pdata += len;
-+ totallen += len;
-+ len = 0;
-+ len = sprintf(line, "USER MODULE INFORMATION:\n");
-+ copy_to_user(pdata, line, len);
-+ pdata += len;
-+ totallen += len;
-+ len = 0;
-+ for (i = 0; i < MAX_MOD_ID; i++) {
-+ if (modArr[i] != NULL) {
-+ len = sprintf(line, " Module ID = %d \n", i);
-+ copy_to_user(pdata, line, len);
-+ pdata += len;
-+ totallen += len;
-+ len = 0;
-+ for (j = 0; j < MAX_STATE_ID; j++) {
-+ if (modArr[i]->states[j] != NULL) {
-+ len = sprintf(line, " State = %d , Led = %d,", j,
-+ modArr[i]->states[j]->led);
-+ copy_to_user(pdata, line, len);
-+ pdata += len;
-+ totallen += len;
-+
-+ len = 0;
-+ switch (modArr[i]->states[j]->mode) {
-+ case 1:
-+ len = sprintf(line, " Mode = OFF\n");
-+ break;
-+ case 2:
-+ len = sprintf(line, " Mode = BLINK_ON , On Time(ms) = %d\n",
-+ (unsigned int) modArr[i]->states[j]->
-+ param);
-+ break;
-+ case 3:
-+ len = sprintf(line, " Mode = BLINK_OFF , Off Time(ms) = %d\n",
-+ (unsigned int) modArr[i]->states[j]->
-+ param);
-+ break;
-+ case 4:
-+ len = sprintf(line, " Mode = ON \n");
-+ break;
-+ case 5:
-+ len = sprintf(line, " Mode = FLASH , Time Period(ms) = %d\n",
-+ (unsigned int) modArr[i]->states[j]->
-+ param);
-+ break;
-+ default:
-+ break;
-+
-+ }
-+ copy_to_user(pdata, line, len);
-+ pdata += len;
-+ totallen += len;
-+
-+ len = 0;
-+ }
-+ }
-+ }
-+ }
-+ /* Return with configuration information for LEDs */
-+ *offp = totallen;
-+ return totallen;
-+}
-+
-+static ssize_t proc_write_led_fops(struct file *filp, const char *buffer, size_t count, loff_t * offp)
-+{
-+ char *pdata = NULL, *ptemp = NULL;
-+ char line[10], temp[10];
-+ int i = 0;
-+ int mod = 0xFFFF, state = 0xFFFF;
-+ int flag = 0;
-+
-+ /* Check if this write is for configuring stuff */
-+ if (*(int *) (buffer) == 0xFFEEDDCC) {
-+ printk("<1>proc write:Calling Configuration\n");
-+ config_led((unsigned long) (buffer + sizeof(int)));
-+ return count;
-+ }
-+
-+ if (count >= 10) {
-+ printk("<1>proc write:Input too long,max length = %d\n", 10);
-+ return count;
-+ }
-+ memset(temp, 0x00, 10);
-+ memset(line, 0x00, 10);
-+ copy_from_user(line, buffer, count);
-+ line[count] = 0x00;
-+ pdata = line;
-+ ptemp = temp;
-+ while (flag == 0) {
-+ if (i > 10)
-+ break;
-+ if (((*pdata) >= '0') && ((*pdata) <= '9')) {
-+ *ptemp = *pdata;
-+ ptemp++;
-+ } else if ((*pdata) == ',') {
-+ *ptemp = 0x00;
-+ flag = 1;
-+ }
-+ pdata++;
-+ i++;
-+ };
-+ if (flag == 1)
-+ mod = led_atoi(temp);
-+ else
-+ return count;
-+
-+ ptemp = temp;
-+ *ptemp = 0x00;
-+ flag = 0;
-+ while (flag == 0) {
-+ if (i > 10)
-+ break;
-+ if (((*pdata) >= '0') && ((*pdata) <= '9')) {
-+ *ptemp = *pdata;
-+ ptemp++;
-+ } else if ((*pdata) == 0x00) {
-+ *ptemp = 0x00;
-+ flag = 1;
-+ }
-+ pdata++;
-+ i++;
-+ };
-+ if (flag == 1)
-+ state = led_atoi(temp);
-+ else
-+ return count;
-+ if ((mod == 0xFFFF) || (state == 0xFFFF))
-+ return count;
-+ else
-+ led_operation(mod, state);
-+ return count;
-+}
-+
-+static int config_led(unsigned long y)
-+{
-+ config_elem_t *pcfg = NULL;
-+ char *pdata = NULL;
-+ int i;
-+ int length = 0, number = 0;
-+ unsigned int flags;
-+
-+ spin_lock_irqsave(&config_lock, flags);
-+
-+ /* ioctl to configure */
-+ length = *((int *) y);
-+ pdata = (char *) y + sizeof(int);
-+ number = (length - sizeof(int)) / sizeof(config_elem_t);
-+ pcfg = (config_elem_t *) (pdata);
-+
-+ /* Check if an earlier configuration exists IF yes free it up */
-+ free_memory();
-+
-+ for (i = 0; i < number; i++) {
-+ /* If no structure has been allocated for the module do so */
-+ if (modArr[pcfg->name] == NULL) {
-+ printk("<1>module = %d\n", pcfg->name);
-+ if (pcfg->name >= MAX_MOD_ID) {
-+ printk
-+ ("<1>Exiting Configuration: Module ID too large %d\n",
-+ pcfg->name);
-+ free_memory();
-+ spin_unlock_irqrestore(&config_lock, flags);
-+ return -1;
-+ }
-+ modArr[pcfg->name] = kmalloc(sizeof(mod_entry_t), GFP_KERNEL);
-+ if (modArr[pcfg->name] == NULL) {
-+ printk
-+ ("<1>Exiting Configuration: Error in allocating memory\n");
-+ free_memory();
-+ spin_unlock_irqrestore(&config_lock, flags);
-+ return -1;
-+ }
-+ memset(modArr[pcfg->name], 0x00, sizeof(mod_entry_t));
-+ }
-+
-+ /* if no structure is allocated previously for this state
-+ allocate a structure, if it's already there fill it up */
-+ if (modArr[pcfg->name]->states[pcfg->state] == NULL) {
-+ printk("<1>STATE = %d\n", pcfg->state);
-+ if (pcfg->state >= MAX_STATE_ID) {
-+ printk("<1>Exiting Configuration: State ID too large\n");
-+ free_memory();
-+ spin_unlock_irqrestore(&config_lock, flags);
-+ return -1;
-+ }
-+ modArr[pcfg->name]->states[pcfg->state] =
-+ kmalloc(sizeof(state_entry_t), GFP_KERNEL);
-+ if (modArr[pcfg->name]->states[pcfg->state] == NULL) {
-+ free_memory();
-+ spin_unlock_irqrestore(&config_lock, flags);
-+ return -1;
-+ }
-+ memset(modArr[pcfg->name]->states[pcfg->state], 0x00,
-+ sizeof(state_entry_t));
-+ }
-+ /* Fill up the fields of the state */
-+ if (pcfg->led >= MAX_LED_ID) {
-+ printk("<1>led = %d\n", pcfg->led);
-+ free_memory();
-+ spin_unlock_irqrestore(&config_lock, flags);
-+ return -1;
-+ }
-+ modArr[pcfg->name]->states[pcfg->state]->led = pcfg->led;
-+ modArr[pcfg->name]->states[pcfg->state]->mode = pcfg->mode;
-+ modArr[pcfg->name]->states[pcfg->state]->param = pcfg->param;
-+ switch (pcfg->mode) {
-+ case 1:
-+ modArr[pcfg->name]->states[pcfg->state]->handler =
-+ board_led_link_down;
-+ break;
-+ case 2:
-+ case 3:
-+ case 5:
-+ if (pcfg->mode == 2)
-+ modArr[pcfg->name]->states[pcfg->state]->handler =
-+ board_led_activity_on;
-+ else if (pcfg->mode == 3)
-+ modArr[pcfg->name]->states[pcfg->state]->handler =
-+ board_led_activity_off;
-+ else
-+ modArr[pcfg->name]->states[pcfg->state]->handler =
-+ board_led_link_flash;
-+ break;
-+ case 4:
-+ modArr[pcfg->name]->states[pcfg->state]->handler =
-+ board_led_link_up;
-+ break;
-+ default:
-+ printk("<1>Exiting Configuration: Unknown LED Mode\n");
-+ free_memory();
-+ spin_unlock_irqrestore(&config_lock, flags);
-+ return -1;
-+ }
-+ pcfg++;
-+ }
-+ spin_unlock_irqrestore(&config_lock, flags);
-+ return 0;
-+}
-+
-+
-+int led_init(void)
-+{
-+
-+ /* Clear our memory */
-+ memset(modArr, 0x00, sizeof(mod_entry_t *) * MAX_MOD_ID);
-+ memset(led_arr, 0x00, sizeof(led_data_t *) * MAX_LED_ID);
-+
-+ /* Create spin lock for config data structure */
-+ config_lock = SPIN_LOCK_UNLOCKED;
-+
-+ /* Create directory */
-+ led_proc_dir = proc_mkdir("led_mod", NULL);
-+ if (led_proc_dir == NULL)
-+ goto out;
-+
-+ /* Create adsl file */
-+ led_file = create_proc_entry("led", 0777, led_proc_dir);
-+ if (led_file == NULL)
-+ goto led_file;
-+ led_file->owner = THIS_MODULE;
-+ led_file->proc_fops = &led_fops;
-+
-+ memset(modArr, 0x00, sizeof(mod_entry_t *) * MAX_MOD_ID);
-+ /* Reset the GPIO pins */
-+ board_gpio_init();
-+
-+ /* Ron add for ADSL LED blink */
-+ my_mode = 1;
-+ my_led_init(GPIO_ADSL_ACT, 0, -1);
-+ my_led_init(GPIO_ADSL_DOWN, 0, -1);
-+ init_timer(&my_led_timer);
-+ my_led_timer.function = my_led_blink_timer;
-+ my_led_timer.data = 0;
-+ my_led_timer.expires = jiffies + BLINK_SLOW;
-+ add_timer(&my_led_timer);
-+ /* Ron add for ADSL LED blink */
-+ return 0;
-+
-+ led_file:
-+ remove_proc_entry("led", led_proc_dir);
-+ out:
-+ return 0;
-+
-+}
-+
-+void led_operation(int mod, int state)
-+{
-+
-+ unsigned int flags;
-+
-+ spin_lock_irqsave(&config_lock, flags);
-+#if 1
-+ /* Ron Add for ADSL LED blink */
-+ //printk("mod==%d state==%d\n",mod,state);
-+
-+ if (mod == 1) {
-+ switch (state) {
-+ /* off */
-+ case 1:
-+ my_mode = 1;
-+ my_blink_count = 0;
-+ my_led_off(GPIO_ADSL_ACT, -1);
-+ my_led_off(GPIO_ADSL_DOWN, -1);
-+ break;
-+ /* sync */
-+ case 2:
-+ if (my_mode == 1) {
-+ my_mode = 2;
-+ my_led_off(GPIO_ADSL_ACT, -1);
-+ my_blink_count++;
-+ }
-+ break;
-+ /* on */
-+ case 3:
-+ my_mode = 3;
-+ my_blink_count = 0;
-+ my_led_off(GPIO_ADSL_DOWN, -1);
-+ my_led_on(GPIO_ADSL_ACT, -1);
-+ break;
-+ /* off */
-+ case 4:
-+ my_mode = 4;
-+ my_led_off(GPIO_ADSL_DOWN, -1);
-+ my_blink_count++;
-+ break;
-+ }
-+ } /* Ron add for ADSL LED Blink */
-+#endif
-+ if ((mod >= MAX_MOD_ID) || (state >= MAX_STATE_ID)) {
-+ spin_unlock_irqrestore(&config_lock, flags);
-+ return;
-+ }
-+ if (modArr[mod] == NULL) {
-+ spin_unlock_irqrestore(&config_lock, flags);
-+ return;
-+ }
-+ if (modArr[mod]->states[state] == NULL) {
-+ spin_unlock_irqrestore(&config_lock, flags);
-+ return;
-+ }
-+ /* Call the function handler */
-+ modArr[mod]->states[state]->handler(modArr[mod]->states[state]);
-+
-+ spin_unlock_irqrestore(&config_lock, flags);
-+}
-+
-+void register_led_drv(int device, led_reg_t * pInfo)
-+{
-+ unsigned int flags;
-+ struct timer_list *pTimer = NULL;
-+
-+ spin_lock_irqsave(&config_lock, flags);
-+
-+ led_arr[device].led = pInfo;
-+ if (led_arr[device].led->init != 0x00)
-+ led_arr[device].led->init(led_arr[device].led->param);
-+ if (led_arr[device].led->offfunc != 0x00)
-+ led_arr[device].led->offfunc(led_arr[device].led->param);
-+
-+ /* Create a timer for blinking */
-+ pTimer = kmalloc(sizeof(struct timer_list), GFP_KERNEL);
-+ init_timer(pTimer);
-+ pTimer->function = led_timer_func;
-+ pTimer->data = 0;
-+ led_arr[device].pTimer = pTimer;
-+ led_arr[device].timer_running = 0;
-+
-+ spin_unlock_irqrestore(&config_lock, flags);
-+
-+ return;
-+}
-+
-+void deregister_led_drv(int device)
-+{
-+ unsigned int flags;
-+
-+ spin_lock_irqsave(&config_lock, flags);
-+ led_arr[device].led = NULL;
-+
-+ if (led_arr[device].pTimer != NULL) {
-+ del_timer(led_arr[device].pTimer);
-+ kfree(led_arr[device].pTimer);
-+ }
-+ spin_unlock_irqrestore(&config_lock, flags);
-+
-+ return;
-+}
-+
-+EXPORT_SYMBOL_NOVERS(led_init);
-+EXPORT_SYMBOL_NOVERS(led_operation);
-+EXPORT_SYMBOL_NOVERS(register_led_drv);
-+EXPORT_SYMBOL_NOVERS(deregister_led_drv);
-diff -urN kernel-base/arch/mips/ar7/ar7/Makefile kernel-current/arch/mips/ar7/ar7/Makefile
---- kernel-base/arch/mips/ar7/ar7/Makefile 1970-01-01 01:00:00.000000000 +0100
-+++ kernel-current/arch/mips/ar7/ar7/Makefile 2005-07-10 09:31:33.038504888 +0200
-@@ -0,0 +1,31 @@
-+# $Id$
-+# Copyright (C) $Date$ $Author$
-+#
-+# This program is free software; you can redistribute it and/or modify
-+# it under the terms of the GNU General Public License as published by
-+# the Free Software Foundation; either version 2 of the License, or
-+# (at your option) any later version.
-+#
-+# This program is distributed in the hope that it will be useful,
-+# but WITHOUT ANY WARRANTY; without even the implied warranty of
-+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+# GNU General Public License for more details.
-+#
-+# You should have received a copy of the GNU General Public License
-+# along with this program; if not, write to the Free Software
-+# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
-+
-+.S.s:
-+ $(CPP) $(AFLAGS) $< -o $*.s
-+
-+.S.o:
-+ $(CC) $(AFLAGS) -c $< -o $*.o
-+
-+EXTRA_CFLAGS := -DLITTLE_ENDIAN -D_LINK_KSEG0_
-+
-+O_TARGET := ar7.o
-+
-+export-objs:= ledmod.o gpio.o
-+obj-y += ar7_paging.o ar7_jump.o ledmod.o gpio.o tnetd73xx_misc.o
-+
-+include $(TOPDIR)/Rules.make
-diff -urN kernel-base/arch/mips/ar7/ar7/tnetd73xx_misc.c kernel-current/arch/mips/ar7/ar7/tnetd73xx_misc.c
---- kernel-base/arch/mips/ar7/ar7/tnetd73xx_misc.c 1970-01-01 01:00:00.000000000 +0100
-+++ kernel-current/arch/mips/ar7/ar7/tnetd73xx_misc.c 2005-07-10 09:57:09.935860976 +0200
-@@ -0,0 +1,926 @@
-+/******************************************************************************
-+ * FILE PURPOSE: TNETD73xx Misc modules API Source
-+ ******************************************************************************
-+ * FILE NAME: tnetd73xx_misc.c
-+ *
-+ * DESCRIPTION: Clock Control, Reset Control, Power Management, GPIO
-+ * FSER Modules API
-+ * As per TNETD73xx specifications
-+ *
-+ * REVISION HISTORY:
-+ * 27 Nov 02 - Sharath Kumar PSP TII
-+ * 14 Feb 03 - Anant Gole PSP TII
-+ *
-+ * (C) Copyright 2002, Texas Instruments, Inc
-+ *******************************************************************************/
-+
-+
-+#include <linux/stddef.h>
-+#include <linux/types.h>
-+#include <asm/ar7/tnetd73xx.h>
-+#include <asm/ar7/tnetd73xx_misc.h>
-+
-+#define TRUE 1
-+#define FALSE 0
-+
-+/* TNETD73XX Revision */
-+__u32 tnetd73xx_get_revision(void)
-+{
-+ /* Read Chip revision register - This register is from GPIO module */
-+ return ( (__u32) REG32_DATA(TNETD73XX_CVR));
-+}
-+
-+/*****************************************************************************
-+ * Reset Control Module
-+ *****************************************************************************/
-+
-+
-+void tnetd73xx_reset_ctrl(TNETD73XX_RESET_MODULE_T reset_module, TNETD73XX_RESET_CTRL_T reset_ctrl)
-+{
-+ __u32 reset_status;
-+
-+ /* read current reset register */
-+ REG32_READ(TNETD73XX_RST_CTRL_PRCR, reset_status);
-+
-+ if (reset_ctrl == OUT_OF_RESET)
-+ {
-+ /* bring module out of reset */
-+ reset_status |= (1 << reset_module);
-+ }
-+ else
-+ {
-+ /* put module in reset */
-+ reset_status &= (~(1 << reset_module));
-+ }
-+
-+ /* write to the reset register */
-+ REG32_WRITE(TNETD73XX_RST_CTRL_PRCR, reset_status);
-+}
-+
-+
-+TNETD73XX_RESET_CTRL_T tnetd73xx_get_reset_status (TNETD73XX_RESET_MODULE_T reset_module)
-+{
-+ __u32 reset_status;
-+
-+ REG32_READ(TNETD73XX_RST_CTRL_PRCR, reset_status);
-+ return ( (reset_status & (1 << reset_module)) ? OUT_OF_RESET : IN_RESET );
-+}
-+
-+void tnetd73xx_sys_reset(TNETD73XX_SYS_RST_MODE_T mode)
-+{
-+ REG32_WRITE(TNETD73XX_RST_CTRL_SWRCR, mode);
-+}
-+
-+#define TNETD73XX_RST_CTRL_RSR_MASK 0x3
-+
-+TNETD73XX_SYS_RESET_STATUS_T tnetd73xx_get_sys_last_reset_status()
-+{
-+ __u32 sys_reset_status;
-+
-+ REG32_READ(TNETD73XX_RST_CTRL_RSR, sys_reset_status);
-+
-+ return ( (TNETD73XX_SYS_RESET_STATUS_T) (sys_reset_status & TNETD73XX_RST_CTRL_RSR_MASK) );
-+}
-+
-+
-+/*****************************************************************************
-+ * Power Control Module
-+ *****************************************************************************/
-+#define TNETD73XX_GLOBAL_POWER_DOWN_MASK 0x3FFFFFFF /* bit 31, 30 masked */
-+#define TNETD73XX_GLOBAL_POWER_DOWN_BIT 30 /* shift to bit 30, 31 */
-+
-+
-+void tnetd73xx_power_ctrl(TNETD73XX_POWER_MODULE_T power_module, TNETD73XX_POWER_CTRL_T power_ctrl)
-+{
-+ __u32 power_status;
-+
-+ /* read current power down control register */
-+ REG32_READ(TNETD73XX_POWER_CTRL_PDCR, power_status);
-+
-+ if (power_ctrl == POWER_CTRL_POWER_DOWN)
-+ {
-+ /* power down the module */
-+ power_status |= (1 << power_module);
-+ }
-+ else
-+ {
-+ /* power on the module */
-+ power_status &= (~(1 << power_module));
-+ }
-+
-+ /* write to the reset register */
-+ REG32_WRITE(TNETD73XX_POWER_CTRL_PDCR, power_status);
-+}
-+
-+TNETD73XX_POWER_CTRL_T tnetd73xx_get_pwr_status(TNETD73XX_POWER_MODULE_T power_module)
-+{
-+ __u32 power_status;
-+
-+ /* read current power down control register */
-+ REG32_READ(TNETD73XX_POWER_CTRL_PDCR, power_status);
-+
-+ return ( (power_status & (1 << power_module)) ? POWER_CTRL_POWER_DOWN : POWER_CTRL_POWER_UP );
-+}
-+
-+void tnetd73xx_set_global_pwr_mode(TNETD73XX_SYS_POWER_MODE_T power_mode)
-+{
-+ __u32 power_status;
-+
-+ /* read current power down control register */
-+ REG32_READ(TNETD73XX_POWER_CTRL_PDCR, power_status);
-+
-+ power_status &= TNETD73XX_GLOBAL_POWER_DOWN_MASK;
-+ power_status |= ( power_mode << TNETD73XX_GLOBAL_POWER_DOWN_BIT);
-+
-+ /* write to power down control register */
-+ REG32_WRITE(TNETD73XX_POWER_CTRL_PDCR, power_status);
-+}
-+
-+TNETD73XX_SYS_POWER_MODE_T tnetd73xx_get_global_pwr_mode()
-+{
-+ __u32 power_status;
-+
-+ /* read current power down control register */
-+ REG32_READ(TNETD73XX_POWER_CTRL_PDCR, power_status);
-+
-+ power_status &= (~TNETD73XX_GLOBAL_POWER_DOWN_MASK);
-+ power_status = ( power_status >> TNETD73XX_GLOBAL_POWER_DOWN_BIT);
-+
-+ return ( (TNETD73XX_SYS_POWER_MODE_T) power_status );
-+}
-+
-+
-+/*****************************************************************************
-+ * Wakeup Control
-+ *****************************************************************************/
-+
-+#define TNETD73XX_WAKEUP_POLARITY_BIT 16
-+
-+void tnetd73xx_wakeup_ctrl(TNETD73XX_WAKEUP_INTERRUPT_T wakeup_int,
-+ TNETD73XX_WAKEUP_CTRL_T wakeup_ctrl,
-+ TNETD73XX_WAKEUP_POLARITY_T wakeup_polarity)
-+{
-+ __u32 wakeup_status;
-+
-+ /* read the wakeup control register */
-+ REG32_READ(TNETD73XX_POWER_CTRL_WKCR, wakeup_status);
-+
-+ /* enable/disable */
-+ if (wakeup_ctrl == WAKEUP_ENABLED)
-+ {
-+ /* enable wakeup */
-+ wakeup_status |= wakeup_int;
-+ }
-+ else
-+ {
-+ /* disable wakeup */
-+ wakeup_status &= (~wakeup_int);
-+ }
-+
-+ /* set polarity */
-+ if (wakeup_polarity == WAKEUP_ACTIVE_LOW)
-+ {
-+ wakeup_status |= (wakeup_int << TNETD73XX_WAKEUP_POLARITY_BIT);
-+ }
-+ else
-+ {
-+ wakeup_status &= ~(wakeup_int << TNETD73XX_WAKEUP_POLARITY_BIT);
-+ }
-+
-+ /* write the wakeup control register */
-+ REG32_WRITE(TNETD73XX_POWER_CTRL_WKCR, wakeup_status);
-+}
-+
-+
-+/*****************************************************************************
-+ * FSER Control
-+ *****************************************************************************/
-+
-+void tnetd73xx_fser_ctrl(TNETD73XX_FSER_MODE_T fser_mode)
-+{
-+ REG32_WRITE(TNETD73XX_FSER_BASE, fser_mode);
-+}
-+
-+/*****************************************************************************
-+ * Clock Control
-+ *****************************************************************************/
-+
-+#define MIN(x,y) ( ((x) < (y)) ? (x) : (y) )
-+#define MAX(x,y) ( ((x) > (y)) ? (x) : (y) )
-+#define ABS(x) ( ((signed)(x) > 0) ? (x) : (-(x)) )
-+#define CEIL(x,y) ( ((x) + (y) / 2) / (y) )
-+
-+#define CLKC_CLKCR(x) (TNETD73XX_CLOCK_CTRL_BASE + 0x20 + (0x20 * (x)))
-+#define CLKC_CLKPLLCR(x) (TNETD73XX_CLOCK_CTRL_BASE + 0x30 + (0x20 * (x)))
-+
-+#define CLKC_PRE_DIVIDER 0x0000001F
-+#define CLKC_POST_DIVIDER 0x001F0000
-+
-+#define CLKC_PLL_STATUS 0x1
-+#define CLKC_PLL_FACTOR 0x0000F000
-+
-+#define BOOTCR_PLL_BYPASS (1 << 5)
-+#define BOOTCR_MIPS_ASYNC_MODE (1 << 25)
-+
-+#define MIPS_PLL_SELECT 0x00030000
-+#define SYSTEM_PLL_SELECT 0x0000C000
-+#define USB_PLL_SELECT 0x000C0000
-+#define ADSLSS_PLL_SELECT 0x00C00000
-+
-+#define MIPS_AFECLKI_SELECT 0x00000000
-+#define MIPS_REFCLKI_SELECT 0x00010000
-+#define MIPS_XTAL3IN_SELECT 0x00020000
-+
-+#define SYSTEM_AFECLKI_SELECT 0x00000000
-+#define SYSTEM_REFCLKI_SELECT 0x00004000
-+#define SYSTEM_XTAL3IN_SELECT 0x00008000
-+#define SYSTEM_MIPSPLL_SELECT 0x0000C000
-+
-+#define USB_SYSPLL_SELECT 0x00000000
-+#define USB_REFCLKI_SELECT 0x00040000
-+#define USB_XTAL3IN_SELECT 0x00080000
-+#define USB_MIPSPLL_SELECT 0x000C0000
-+
-+#define ADSLSS_AFECLKI_SELECT 0x00000000
-+#define ADSLSS_REFCLKI_SELECT 0x00400000
-+#define ADSLSS_XTAL3IN_SELECT 0x00800000
-+#define ADSLSS_MIPSPLL_SELECT 0x00C00000
-+
-+#define SYS_MAX CLK_MHZ(150)
-+#define SYS_MIN CLK_MHZ(1)
-+
-+#define MIPS_SYNC_MAX SYS_MAX
-+#define MIPS_ASYNC_MAX CLK_MHZ(160)
-+#define MIPS_MIN CLK_MHZ(1)
-+
-+#define USB_MAX CLK_MHZ(100)
-+#define USB_MIN CLK_MHZ(1)
-+
-+#define ADSL_MAX CLK_MHZ(180)
-+#define ADSL_MIN CLK_MHZ(1)
-+
-+#define PLL_MUL_MAXFACTOR 15
-+#define MAX_DIV_VALUE 32
-+#define MIN_DIV_VALUE 1
-+
-+#define MIN_PLL_INP_FREQ CLK_MHZ(8)
-+#define MAX_PLL_INP_FREQ CLK_MHZ(100)
-+
-+#define DIVIDER_LOCK_TIME 10100
-+#define PLL_LOCK_TIME 10100 * 75
-+
-+
-+
-+/****************************************************************************
-+ * DATA PURPOSE: PRIVATE Variables
-+ **************************************************************************/
-+static __u32 *clk_src[4];
-+static __u32 mips_pll_out;
-+static __u32 sys_pll_out;
-+static __u32 afeclk_inp;
-+static __u32 refclk_inp;
-+static __u32 xtal_inp;
-+static __u32 present_min;
-+static __u32 present_max;
-+
-+/* Forward References */
-+static __u32 find_gcd(__u32 min, __u32 max);
-+static __u32 compute_prediv( __u32 divider, __u32 min, __u32 max);
-+static void get_val(__u32 base_freq, __u32 output_freq,__u32 *multiplier, __u32 *divider);
-+static __u32 get_base_frequency(TNETD73XX_CLKC_ID_T clk_id);
-+static void find_approx(__u32 *,__u32 *,__u32);
-+
-+/****************************************************************************
-+ * FUNCTION: tnetd73xx_clkc_init
-+ ****************************************************************************
-+ * Description: The routine initializes the internal variables depending on
-+ * on the sources selected for different clocks.
-+ ***************************************************************************/
-+void tnetd73xx_clkc_init(__u32 afeclk, __u32 refclk, __u32 xtal3in)
-+{
-+
-+ __u32 choice;
-+
-+ afeclk_inp = afeclk;
-+ refclk_inp = refclk;
-+ xtal_inp = xtal3in;
-+
-+ choice = REG32_DATA(TNETD73XX_DCL_BOOTCR) & MIPS_PLL_SELECT;
-+ switch(choice)
-+ {
-+ case MIPS_AFECLKI_SELECT:
-+ clk_src[CLKC_MIPS] = &afeclk_inp;
-+ break;
-+
-+ case MIPS_REFCLKI_SELECT:
-+ clk_src[CLKC_MIPS] = &refclk_inp;
-+ break;
-+
-+ case MIPS_XTAL3IN_SELECT:
-+ clk_src[CLKC_MIPS] = &xtal_inp;
-+ break;
-+
-+ default :
-+ clk_src[CLKC_MIPS] = 0;
-+
-+ }
-+
-+ choice = REG32_DATA(TNETD73XX_DCL_BOOTCR) & SYSTEM_PLL_SELECT;
-+ switch(choice)
-+ {
-+ case SYSTEM_AFECLKI_SELECT:
-+ clk_src[CLKC_SYS] = &afeclk_inp;
-+ break;
-+
-+ case SYSTEM_REFCLKI_SELECT:
-+ clk_src[CLKC_SYS] = &refclk_inp;
-+ break;
-+
-+ case SYSTEM_XTAL3IN_SELECT:
-+ clk_src[CLKC_SYS] = &xtal_inp;
-+ break;
-+
-+ case SYSTEM_MIPSPLL_SELECT:
-+ clk_src[CLKC_SYS] = &mips_pll_out;
-+ break;
-+
-+ default :
-+ clk_src[CLKC_SYS] = 0;
-+
-+ }
-+
-+
-+ choice = REG32_DATA(TNETD73XX_DCL_BOOTCR) & ADSLSS_PLL_SELECT;
-+ switch(choice)
-+ {
-+ case ADSLSS_AFECLKI_SELECT:
-+ clk_src[CLKC_ADSLSS] = &afeclk_inp;
-+ break;
-+
-+ case ADSLSS_REFCLKI_SELECT:
-+ clk_src[CLKC_ADSLSS] = &refclk_inp;
-+ break;
-+
-+ case ADSLSS_XTAL3IN_SELECT:
-+ clk_src[CLKC_ADSLSS] = &xtal_inp;
-+ break;
-+
-+ case ADSLSS_MIPSPLL_SELECT:
-+ clk_src[CLKC_ADSLSS] = &mips_pll_out;
-+ break;
-+
-+ default :
-+ clk_src[CLKC_ADSLSS] = 0;
-+
-+ }
-+
-+
-+ choice = REG32_DATA(TNETD73XX_DCL_BOOTCR) & USB_PLL_SELECT;
-+ switch(choice)
-+ {
-+ case USB_SYSPLL_SELECT:
-+ clk_src[CLKC_USB] = &sys_pll_out ;
-+ break;
-+
-+ case USB_REFCLKI_SELECT:
-+ clk_src[CLKC_USB] = &refclk_inp;
-+ break;
-+
-+ case USB_XTAL3IN_SELECT:
-+ clk_src[CLKC_USB] = &xtal_inp;
-+ break;
-+
-+ case USB_MIPSPLL_SELECT:
-+ clk_src[CLKC_USB] = &mips_pll_out;
-+ break;
-+
-+ default :
-+ clk_src[CLKC_USB] = 0;
-+
-+ }
-+}
-+
-+
-+
-+/****************************************************************************
-+ * FUNCTION: tnetd73xx_clkc_set_freq
-+ ****************************************************************************
-+ * Description: The above routine is called to set the output_frequency of the
-+ * selected clock(using clk_id) to the required value given
-+ * by the variable output_freq.
-+ ***************************************************************************/
-+TNETD73XX_ERR tnetd73xx_clkc_set_freq
-+(
-+ TNETD73XX_CLKC_ID_T clk_id,
-+ __u32 output_freq
-+)
-+{
-+ __u32 base_freq;
-+ __u32 multiplier;
-+ __u32 divider;
-+ __u32 min_prediv;
-+ __u32 max_prediv;
-+ __u32 prediv;
-+ __u32 postdiv;
-+ __u32 temp;
-+
-+ /* check if PLLs are bypassed*/
-+ if(REG32_DATA(TNETD73XX_DCL_BOOTCR) & BOOTCR_PLL_BYPASS)
-+ {
-+ return TNETD73XX_ERR_ERROR;
-+ }
-+
-+ /*check if the requested output_frequency is in valid range*/
-+ switch( clk_id )
-+ {
-+ case CLKC_SYS:
-+ if( output_freq < SYS_MIN || output_freq > SYS_MAX)
-+ {
-+ return TNETD73XX_ERR_ERROR;
-+ }
-+ present_min = SYS_MIN;
-+ present_max = SYS_MAX;
-+ break;
-+
-+ case CLKC_MIPS:
-+ if((output_freq < MIPS_MIN) ||
-+ (output_freq > ((REG32_DATA(TNETD73XX_DCL_BOOTCR) & BOOTCR_MIPS_ASYNC_MODE) ? MIPS_ASYNC_MAX: MIPS_SYNC_MAX)))
-+ {
-+ return TNETD73XX_ERR_ERROR;
-+ }
-+ present_min = MIPS_MIN;
-+ present_max = (REG32_DATA(TNETD73XX_DCL_BOOTCR) & BOOTCR_MIPS_ASYNC_MODE) ? MIPS_ASYNC_MAX: MIPS_SYNC_MAX;
-+ break;
-+
-+ case CLKC_USB:
-+ if( output_freq < USB_MIN || output_freq > USB_MAX)
-+ {
-+ return TNETD73XX_ERR_ERROR;
-+ }
-+ present_min = USB_MIN;
-+ present_max = USB_MAX;
-+ break;
-+
-+ case CLKC_ADSLSS:
-+ if( output_freq < ADSL_MIN || output_freq > ADSL_MAX)
-+ {
-+ return TNETD73XX_ERR_ERROR;
-+ }
-+ present_min = ADSL_MIN;
-+ present_max = ADSL_MAX;
-+ break;
-+ }
-+
-+
-+ base_freq = get_base_frequency(clk_id);
-+
-+
-+ /* check for minimum base frequency value */
-+ if( base_freq < MIN_PLL_INP_FREQ)
-+ {
-+ return TNETD73XX_ERR_ERROR;
-+ }
-+
-+ get_val(output_freq, base_freq, &multiplier, ÷r);
-+
-+ /* check multiplier range */
-+ if( (multiplier > PLL_MUL_MAXFACTOR) || (multiplier <= 0) )
-+ {
-+ return TNETD73XX_ERR_ERROR;
-+ }
-+
-+ /* check divider value */
-+ if( divider == 0 )
-+ {
-+ return TNETD73XX_ERR_ERROR;
-+ }
-+
-+ /*compute minimum and maximum predivider values */
-+ min_prediv = MAX(base_freq / MAX_PLL_INP_FREQ + 1, divider / MAX_DIV_VALUE + 1);
-+ max_prediv = MIN(base_freq / MIN_PLL_INP_FREQ, MAX_DIV_VALUE);
-+
-+ /*adjust the value of divider so that it not less than minimum predivider value*/
-+ if (divider < min_prediv)
-+ {
-+ temp = CEIL(min_prediv, divider);
-+ if ((temp * multiplier) > PLL_MUL_MAXFACTOR)
-+ {
-+ return TNETD73XX_ERR_ERROR ;
-+ }
-+ else
-+ {
-+ multiplier = temp * multiplier;
-+ divider = min_prediv;
-+ }
-+
-+ }
-+
-+ /* compute predivider and postdivider values */
-+ prediv = compute_prediv (divider, min_prediv, max_prediv);
-+ postdiv = CEIL(divider,prediv);
-+
-+ /*return fail if postdivider value falls out of range */
-+ if(postdiv > MAX_DIV_VALUE)
-+ {
-+ return TNETD73XX_ERR_ERROR;
-+ }
-+
-+
-+ /*write predivider and postdivider values*/
-+ /* pre-Divider and post-divider are 5 bit N+1 dividers */
-+ REG32_WRITE(CLKC_CLKCR(clk_id), ((postdiv -1) & 0x1F) << 16 | ((prediv -1) & 0x1F) );
-+
-+ /*wait for divider output to stabilise*/
-+ for(temp =0; temp < DIVIDER_LOCK_TIME; temp++);
-+
-+ /*write to PLL clock register*/
-+
-+ if(clk_id == CLKC_SYS)
-+ {
-+ /* but before writing put DRAM to hold mode */
-+ REG32_DATA(TNETD73XX_EMIF_SDRAM_CFG) |= 0x80000000;
-+ }
-+ /*Bring PLL into div mode */
-+ REG32_WRITE(CLKC_CLKPLLCR(clk_id), 0x4);
-+
-+ /*compute the word to be written to PLLCR
-+ *corresponding to multiplier value
-+ */
-+ multiplier = (((multiplier - 1) & 0xf) << 12)| ((255 <<3) | 0x0e);
-+
-+ /* wait till PLL enters div mode */
-+ while(REG32_DATA(CLKC_CLKPLLCR(clk_id)) & CLKC_PLL_STATUS)
-+ /*nothing*/;
-+
-+ REG32_WRITE(CLKC_CLKPLLCR(clk_id), multiplier);
-+
-+ while(!REG32_DATA(CLKC_CLKPLLCR(clk_id)) & CLKC_PLL_STATUS)
-+ /*nothing*/;
-+
-+
-+ /*wait for External pll to lock*/
-+ for(temp =0; temp < PLL_LOCK_TIME; temp++);
-+
-+ if(clk_id == CLKC_SYS)
-+ {
-+ /* Bring DRAM out of hold */
-+ REG32_DATA(TNETD73XX_EMIF_SDRAM_CFG) &= ~0x80000000;
-+ }
-+
-+ return TNETD73XX_ERR_OK ;
-+}
-+
-+/****************************************************************************
-+ * FUNCTION: tnetd73xx_clkc_get_freq
-+ ****************************************************************************
-+ * Description: The above routine is called to get the output_frequency of the
-+ * selected clock( clk_id)
-+ ***************************************************************************/
-+__u32 tnetd73xx_clkc_get_freq
-+(
-+ TNETD73XX_CLKC_ID_T clk_id
-+)
-+{
-+
-+ __u32 clk_ctrl_register;
-+ __u32 clk_pll_setting;
-+ __u32 clk_predivider;
-+ __u32 clk_postdivider;
-+ __u16 pll_factor;
-+ __u32 base_freq;
-+ __u32 divider;
-+
-+ base_freq = get_base_frequency(clk_id);
-+
-+ clk_ctrl_register = REG32_DATA(CLKC_CLKCR(clk_id));
-+
-+ /* pre-Divider and post-divider are 5 bit N+1 dividers */
-+ clk_predivider = (CLKC_PRE_DIVIDER & clk_ctrl_register) + 1;
-+ clk_postdivider = ((CLKC_POST_DIVIDER & clk_ctrl_register) >> 16) + 1;
-+
-+ divider = clk_predivider * clk_postdivider;
-+
-+
-+ if( (REG32_DATA(TNETD73XX_DCL_BOOTCR) & BOOTCR_PLL_BYPASS))
-+ {
-+ return (CEIL(base_freq, divider)); /* PLLs bypassed.*/
-+ }
-+
-+
-+ else
-+ {
-+ /* return the current clock speed based upon the PLL setting */
-+ clk_pll_setting = REG32_DATA(CLKC_CLKPLLCR(clk_id));
-+
-+ /* Get the PLL multiplication factor */
-+ pll_factor = ((clk_pll_setting & CLKC_PLL_FACTOR) >> 12) + 1;
-+
-+ /* Check if we're in divide mode or multiply mode */
-+ if((clk_pll_setting & 0x1) == 0)
-+ {
-+ /* We're in divide mode */
-+ if(pll_factor < 0x10)
-+ return (CEIL(base_freq >> 1, divider));
-+ else
-+ return (CEIL(base_freq >> 2, divider));
-+ }
-+
-+ else /* We're in PLL mode */
-+ {
-+ /* See if PLLNDIV & PLLDIV are set */
-+ if((clk_pll_setting & 0x0800) && (clk_pll_setting & 0x2))
-+ {
-+ if(clk_pll_setting & 0x1000)
-+ {
-+ /* clk = base_freq * k/2 */
-+ return(CEIL((base_freq * pll_factor) >> 1, divider));
-+ }
-+ else
-+ {
-+ /* clk = base_freq * (k-1) / 4)*/
-+ return(CEIL((base_freq * (pll_factor - 1)) >>2, divider));
-+ }
-+ }
-+ else
-+ {
-+ if(pll_factor < 0x10)
-+ {
-+ /* clk = base_freq * k */
-+ return(CEIL(base_freq * pll_factor, divider));
-+ }
-+
-+ else
-+ {
-+ /* clk = base_freq */
-+ return(CEIL(base_freq, divider));
-+ }
-+ }
-+ }
-+ return(0); /* Should never reach here */
-+
-+ }
-+
-+}
-+
-+
-+/* local helper functions */
-+
-+ /****************************************************************************
-+ * FUNCTION: get_base_frequency
-+ ****************************************************************************
-+ * Description: The above routine is called to get base frequency of the clocks.
-+ ***************************************************************************/
-+
-+static __u32 get_base_frequency(TNETD73XX_CLKC_ID_T clk_id)
-+{
-+ /* update the current MIPs PLL output value, if the required
-+ * source is MIPS PLL
-+ */
-+ if ( clk_src[clk_id] == &mips_pll_out)
-+ {
-+ *clk_src[clk_id] = tnetd73xx_clkc_get_freq(CLKC_MIPS);
-+ }
-+
-+
-+ /* update the current System PLL output value, if the required
-+ * source is system PLL
-+ */
-+ if ( clk_src[clk_id] == &sys_pll_out)
-+ {
-+ *clk_src[clk_id] = tnetd73xx_clkc_get_freq(CLKC_SYS);
-+ }
-+
-+ return (*clk_src[clk_id]);
-+
-+}
-+
-+
-+
-+/****************************************************************************
-+ * FUNCTION: find_gcd
-+ ****************************************************************************
-+ * Description: The above routine is called to find gcd of 2 numbers.
-+ ***************************************************************************/
-+static __u32 find_gcd
-+(
-+__u32 min,
-+__u32 max
-+)
-+{
-+ if (max % min == 0)
-+ {
-+ return min;
-+ }
-+ else
-+ {
-+ return find_gcd(max % min, min);
-+ }
-+}
-+
-+/****************************************************************************
-+ * FUNCTION: compute_prediv
-+ ****************************************************************************
-+ * Description: The above routine is called to compute predivider value
-+ ***************************************************************************/
-+static __u32 compute_prediv(__u32 divider, __u32 min, __u32 max)
-+{
-+__u16 prediv;
-+
-+/* return the divider itself it it falls within the range of predivider*/
-+if (min <= divider && divider <= max)
-+{
-+ return divider;
-+}
-+
-+/* find a value for prediv such that it is a factor of divider */
-+for (prediv = max; prediv >= min ; prediv--)
-+{
-+ if ( (divider % prediv) == 0 )
-+ {
-+ return prediv;
-+ }
-+}
-+
-+/* No such factor exists, return min as prediv */
-+return min;
-+}
-+
-+/****************************************************************************
-+ * FUNCTION: get_val
-+ ****************************************************************************
-+ * Description: This routine is called to get values of divider and multiplier.
-+ ***************************************************************************/