-@@ -2347,16 +2350,6 @@
- }
- if (status & HAL_INT_MIB) {
- sc->sc_stats.ast_mib++;
-- /* When the card receives lots of PHY errors, the MIB
-- * interrupt will fire at a very rapid rate. We will use
-- * a timer to enforce at least 1 jiffy delay between
-- * MIB interrupts. This should be unproblematic, since
-- * the hardware will continue to update the counters in
-- * the mean time. */
-- sc->sc_imask &= ~HAL_INT_MIB;
-- ath_hal_intrset(ah, sc->sc_imask);
-- mod_timer(&sc->sc_mib_enable, jiffies + 1);
--
- /* Let the HAL handle the event. */
- ath_hal_mibevent(ah, &sc->sc_halstats);
- }
-@@ -2426,6 +2419,43 @@