#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
+#include <linux/ssb/ssb.h>
#include <asm/addrspace.h>
#include <bcm63xx_board.h>
#include <bcm63xx_cpu.h>
#include <bcm63xx_board.h>
#include <bcm63xx_dev_pci.h>
#include <bcm63xx_dev_uart.h>
+#include <bcm63xx_dev_wdt.h>
#include <bcm63xx_dev_enet.h>
+#include <bcm63xx_dev_dsp.h>
#include <bcm63xx_dev_pcmcia.h>
#include <bcm63xx_dev_usb_ohci.h>
#include <bcm63xx_dev_usb_ehci.h>
+#include <bcm63xx_dev_usb_udc.h>
+#include <bcm63xx_dev_spi.h>
#include <board_bcm963xx.h>
#define PFX "board_bcm963xx: "
static unsigned int mac_addr_used = 0;
static struct board_info board;
+/*
+ * known 6338 boards
+ */
+
+#ifdef CONFIG_BCM63XX_CPU_6338
+static struct board_info __initdata board_96338gw = {
+ .name = "96338GW",
+ .expected_cpu_id = 0x6338,
+
+ .has_enet0 = 1,
+ .enet0 = {
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+
+ .has_ohci0 = 1,
+};
+
+static struct board_info __initdata board_96338w = {
+ .name = "96338W",
+ .expected_cpu_id = 0x6338,
+
+ .has_enet0 = 1,
+ .enet0 = {
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ }
+};
+#endif
+
+/*
+ * known 6345 boards
+ */
+#ifdef CONFIG_BCM63XX_CPU_6345
+static struct board_info __initdata board_96345gw2 = {
+ .name = "96345GW2",
+ .expected_cpu_id = 0x6345,
+};
+#endif
+
/*
* known 6348 boards
*/
},
};
+static struct board_info __initdata board_96348gw_10 = {
+ .name = "96348GW-10",
+ .expected_cpu_id = 0x6348,
+
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
+
+ .enet0 = {
+ .has_phy = 1,
+ .use_internal_phy = 1,
+ },
+ .enet1 = {
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+
+ .has_ohci0 = 1,
+ .has_pccard = 1,
+ .has_ehci0 = 1,
+
+ .has_dsp = 1,
+ .dsp = {
+ .gpio_rst = 6,
+ .gpio_int = 34,
+ .cs = 2,
+ .ext_irq = 2,
+ },
+};
+
static struct board_info __initdata board_96348gw_11 = {
.name = "96348GW-11",
.expected_cpu_id = 0x6348,
.force_speed_100 = 1,
.force_duplex_full = 1,
},
+
+ .has_ohci0 = 1,
+ .has_dsp = 1,
+
+ .dsp = {
+ .gpio_rst = 6,
+ .gpio_int = 34,
+ .ext_irq = 2,
+ .cs = 2,
+ },
+};
+
+static struct board_info __initdata board_FAST2404 = {
+ .name = "F@ST2404",
+ .expected_cpu_id = 0x6348,
+
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
+
+ .enet0 = {
+ .has_phy = 1,
+ .use_internal_phy = 1,
+ },
+
+ .enet1 = {
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+
+
+ .has_ohci0 = 1,
+ .has_pccard = 1,
+ .has_ehci0 = 1,
+};
+
+static struct board_info __initdata board_DV201AMR = {
+ .name = "DV201AMR",
+ .expected_cpu_id = 0x6348,
+
+ .has_pci = 1,
+ .has_ohci0 = 1,
+ .has_udc0 = 1,
+
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .enet0 = {
+ .has_phy = 1,
+ .use_internal_phy = 1,
+ },
+ .enet1 = {
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+};
+
+static struct board_info __initdata board_96348gw_a = {
+ .name = "96348GW-A",
+ .expected_cpu_id = 0x6348,
+
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
+
+ .enet0 = {
+ .has_phy = 1,
+ .use_internal_phy = 1,
+ },
+ .enet1 = {
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+
+ .has_ohci0 = 1,
};
+
+
#endif
/*
.has_pccard = 1,
.has_ehci0 = 1,
};
+
+static struct board_info __initdata board_AGPFS0 = {
+ .name = "AGPF-S0",
+ .expected_cpu_id = 0x6358,
+
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
+
+ .enet0 = {
+ .has_phy = 1,
+ .use_internal_phy = 1,
+ },
+
+ .enet1 = {
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+};
#endif
/*
* all boards
*/
static const struct board_info __initdata *bcm963xx_boards[] = {
+#ifdef CONFIG_BCM63XX_CPU_6338
+ &board_96338gw,
+ &board_96338w,
+#endif
+#ifdef CONFIG_BCM63XX_CPU_6345
+ &board_96345gw2,
+#endif
#ifdef CONFIG_BCM63XX_CPU_6348
&board_96348r,
&board_96348gw,
+ &board_96348gw_10,
&board_96348gw_11,
+ &board_FAST2404,
+ &board_DV201AMR,
+ &board_96348gw_a,
#endif
#ifdef CONFIG_BCM63XX_CPU_6358
&board_96358vw,
&board_96358vw2,
+ &board_AGPFS0,
#endif
};
char cfe_version[32];
u32 val;
- /* read base address of boot chip select (0) */
- val = bcm_mpi_readl(MPI_CSBASE_REG(0));
- val &= MPI_CSBASE_BASE_MASK;
+ /* read base address of boot chip select (0)
+ * 6338/6345 does not have MPI but boots from standard
+ * MIPS Flash address */
+ if (BCMCPU_IS_6345())
+ val = 0x1fc00000;
+ else {
+ val = bcm_mpi_readl(MPI_CSBASE_REG(0));
+ val &= MPI_CSBASE_BASE_MASK;
+ }
boot_addr = (u8 *)KSEG1ADDR(val);
/* dump cfe version */
* this has to be done this early since PCI init is done
* inside arch_initcall */
val = 0;
-
+#ifdef CONFIG_PCI
if (board.has_pci) {
bcm63xx_pci_enabled = 1;
if (BCMCPU_IS_6348())
val |= GPIO_MODE_6348_G2_PCI;
}
-
+#endif
if (board.has_pccard) {
if (BCMCPU_IS_6348())
val |= GPIO_MODE_6348_G1_MII_PCCARD;
return 0;
}
-static struct mtd_partition mtd_partitions[] = {
- {
- .name = "cfe",
- .offset = 0x0,
- .size = 0x40000,
- }
-};
-
-static struct physmap_flash_data flash_data = {
- .width = 2,
- .nr_parts = ARRAY_SIZE(mtd_partitions),
- .parts = mtd_partitions,
-};
-
static struct resource mtd_resources[] = {
{
.start = 0, /* filled at runtime */
};
static struct platform_device mtd_dev = {
- .name = "physmap-flash",
+ .name = "bcm963xx-flash",
.resource = mtd_resources,
.num_resources = ARRAY_SIZE(mtd_resources),
- .dev = {
- .platform_data = &flash_data,
- },
+};
+
+/*
+ * Register a sane SPROMv2 to make the on-board
+ * bcm4318 WLAN work
+ */
+static struct ssb_sprom bcm63xx_sprom = {
+ .revision = 0x02,
+ .board_rev = 0x17,
+ .country_code = 0x0,
+ .ant_available_bg = 0x3,
+ .pa0b0 = 0x15ae,
+ .pa0b1 = 0xfa85,
+ .pa0b2 = 0xfe8d,
+ .pa1b0 = 0xffff,
+ .pa1b1 = 0xffff,
+ .pa1b2 = 0xffff,
+ .gpio0 = 0xff,
+ .gpio1 = 0xff,
+ .gpio2 = 0xff,
+ .gpio3 = 0xff,
+ .maxpwr_bg = 0x004c,
+ .itssi_bg = 0x00,
+ .boardflags_lo = 0x2848,
+ .boardflags_hi = 0x0000,
+};
+
+static struct resource gpiodev_resource = {
+ .start = 0xFFFFFFFF,
};
/*
u32 val;
bcm63xx_uart_register();
+ bcm63xx_wdt_register();
+ bcm63xx_spi_register();
if (board.has_pccard)
bcm63xx_pcmcia_register();
if (board.has_ehci0)
bcm63xx_ehci_register();
+ if (board.has_udc0)
+ bcm63xx_udc_register();
+
+ if (board.has_dsp)
+ bcm63xx_dsp_register(&board.dsp);
+
+ /* Generate MAC address for WLAN and
+ * register our SPROM */
+#ifdef CONFIG_PCI
+ if (!board_get_mac_address(bcm63xx_sprom.il0mac)) {
+ memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
+ memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
+ if (ssb_arch_set_fallback_sprom(&bcm63xx_sprom) < 0)
+ printk(KERN_ERR "failed to register fallback SPROM\n");
+ }
+#endif
/* read base address of boot chip select (0) */
- val = bcm_mpi_readl(MPI_CSBASE_REG(0));
- val &= MPI_CSBASE_BASE_MASK;
+ if (BCMCPU_IS_6345())
+ val = 0x1fc0000;
+ else {
+ val = bcm_mpi_readl(MPI_CSBASE_REG(0));
+ val &= MPI_CSBASE_BASE_MASK;
+ }
mtd_resources[0].start = val;
mtd_resources[0].end = 0x1FFFFFFF;
platform_device_register(&mtd_dev);
+ /* Register GPIODEV */
+ platform_device_register_simple("GPIODEV", 0, &gpiodev_resource, 1);
+
return 0;
}
projects / openwrt.git / blobdiff