status = sw_int_status() & SWITCH_INTS_POLL;
if ((done < limit) && (!status)) {
SW_DBG("disable polling mode for %s\n", dev->name);
- netif_rx_complete(dev, napi);
+ napi_complete(napi);
sw_int_unmask(SWITCH_INTS_POLL);
return 0;
}
sw_dump_intr_mask("poll ints", status);
SW_DBG("enable polling mode for %s\n", dev->name);
sw_int_mask(SWITCH_INTS_POLL);
- netif_rx_schedule(dev, &priv->napi);
+ napi_schedule(&priv->napi);
}
#else
sw_int_ack(status);
adm5120_if_napi_enable(dev);
- err = request_irq(dev->irq, adm5120_switch_irq,
- (IRQF_SHARED | IRQF_DISABLED), dev->name, dev);
+ err = request_irq(dev->irq, adm5120_switch_irq, IRQF_SHARED,
+ dev->name, dev);
if (err) {
SW_ERR("unable to get irq for %s\n", dev->name);
goto err;
static int adm5120_if_set_mac_address(struct net_device *dev, void *p)
{
- struct sockaddr *addr = p;
+ int ret;
+
+ ret = eth_mac_addr(dev, p);
+ if (ret)
+ return ret;
- memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
adm5120_write_mac(dev);
return 0;
}
return 0;
}
+static const struct net_device_ops adm5120sw_netdev_ops = {
+ .ndo_open = adm5120_if_open,
+ .ndo_stop = adm5120_if_stop,
+ .ndo_start_xmit = adm5120_if_hard_start_xmit,
+ .ndo_set_multicast_list = adm5120_if_set_multicast_list,
+ .ndo_do_ioctl = adm5120_if_do_ioctl,
+ .ndo_tx_timeout = adm5120_if_tx_timeout,
+ .ndo_validate_addr = eth_validate_addr,
+ .ndo_change_mtu = eth_change_mtu,
+ .ndo_set_mac_address = adm5120_if_set_mac_address,
+};
+
static struct net_device *adm5120_if_alloc(void)
{
struct net_device *dev;
priv->dev = dev;
dev->irq = ADM5120_IRQ_SWITCH;
- dev->open = adm5120_if_open;
- dev->hard_start_xmit = adm5120_if_hard_start_xmit;
- dev->stop = adm5120_if_stop;
- dev->set_multicast_list = adm5120_if_set_multicast_list;
- dev->do_ioctl = adm5120_if_do_ioctl;
- dev->tx_timeout = adm5120_if_tx_timeout;
+ dev->netdev_ops = &adm5120sw_netdev_ops;
dev->watchdog_timeo = TX_TIMEOUT;
- dev->set_mac_address = adm5120_if_set_mac_address;
#ifdef CONFIG_ADM5120_SWITCH_NAPI
netif_napi_add(dev, &priv->napi, adm5120_if_poll, 64);