* This header file defines the hardware registers of the ADM5120 SoC
* built-in NAND interface.
*
- * Copyright (C) 2007 OpenWrt.org
- * Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org>
+ * Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
*
* NAND interface routines was based on a driver for Linux 2.6.19+ which
* was derived from the driver for Linux 2.4.xx published by Mikrotik for
* their RouterBoard 1xx and 5xx series boards.
* Copyright (C) 2007 David Goodenough <david.goodenough@linkchoose.co.uk>
* Copyright (C) 2007 Florian Fainelli <florian@openwrt.org>
- * The original Mikrotik code seems not to have a license.
*
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version 2
- * of the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the
- * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
- * Boston, MA 02110-1301, USA.
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
*
*/
-#ifndef _ADM5120_NAND_H_
-#define _ADM5120_NAND_H_
+#ifndef _MACH_ADM5120_NAND_H
+#define _MACH_ADM5120_NAND_H
#include <linux/types.h>
#include <linux/io.h>
-#include <adm5120_defs.h>
-#include <adm5120_switch.h>
+#include <asm/mach-adm5120/adm5120_defs.h>
+#include <asm/mach-adm5120/adm5120_switch.h>
/* NAND control registers */
#define NAND_REG_DATA 0x0 /* data register */
static inline void adm5120_nand_enable(void)
{
- SW_WRITE_REG(BW_CNTL1, BW_CNTL1_NAND_ENABLE);
- SW_WRITE_REG(BOOT_DONE, 1);
+ SW_WRITE_REG(SWITCH_REG_BW_CNTL1, BW_CNTL1_NAND_ENABLE);
+ SW_WRITE_REG(SWITCH_REG_BOOT_DONE, 1);
}
static inline void adm5120_nand_set_wpn(unsigned int set)
return NAND_READ_REG(NAND_REG_STATUS);
}
-#endif /* _ADM5120_NAND_H_ */
+#endif /* _MACH_ADM5120_NAND_H */