#include <bcm63xx_io.h>
#include <bcm63xx_regs.h>
+static DEFINE_SPINLOCK(bcm63xx_gpio_lock);
+static u32 gpio_out_low, gpio_out_high;
+
static void bcm63xx_gpio_set(struct gpio_chip *chip,
- unsigned gpio, int val)
+ unsigned gpio, int val)
{
u32 reg;
u32 mask;
- u32 tmp;
+ u32 *v;
unsigned long flags;
if (gpio >= chip->ngpio)
if (gpio < 32) {
reg = GPIO_DATA_LO_REG;
mask = 1 << gpio;
+ v = &gpio_out_low;
} else {
reg = GPIO_DATA_HI_REG;
mask = 1 << (gpio - 32);
+ v = &gpio_out_high;
}
- local_irq_save(flags);
- tmp = bcm_gpio_readl(reg);
+ spin_lock_irqsave(&bcm63xx_gpio_lock, flags);
if (val)
- tmp |= mask;
+ *v |= mask;
else
- tmp &= ~mask;
- bcm_gpio_writel(tmp, reg);
- local_irq_restore(flags);
+ *v &= ~mask;
+ bcm_gpio_writel(*v, reg);
+ spin_unlock_irqrestore(&bcm63xx_gpio_lock, flags);
}
static int bcm63xx_gpio_get(struct gpio_chip *chip, unsigned gpio)
}
static int bcm63xx_gpio_set_direction(struct gpio_chip *chip,
- unsigned gpio, int dir)
+ unsigned gpio, int dir)
{
u32 reg;
u32 mask;
mask = 1 << (gpio - 32);
}
- local_irq_save(flags);
+ spin_lock_irqsave(&bcm63xx_gpio_lock, flags);
tmp = bcm_gpio_readl(reg);
if (dir == GPIO_DIR_IN)
tmp &= ~mask;
else
tmp |= mask;
bcm_gpio_writel(tmp, reg);
- local_irq_restore(flags);
+ spin_unlock_irqrestore(&bcm63xx_gpio_lock, flags);
return 0;
}
}
static int bcm63xx_gpio_direction_output(struct gpio_chip *chip,
- unsigned gpio, int value)
+ unsigned gpio, int value)
{
bcm63xx_gpio_set(chip, gpio, value);
return bcm63xx_gpio_set_direction(chip, gpio, GPIO_DIR_OUT);
.get = bcm63xx_gpio_get,
.set = bcm63xx_gpio_set,
.base = 0,
- .ngpio = BCM63XX_GPIO_COUNT,
};
-static int __init bcm63xx_gpio_init(void)
+int __init bcm63xx_gpio_init(void)
{
- printk(KERN_INFO "registering %d GPIOs\n", BCM63XX_GPIO_COUNT);
+ bcm63xx_gpio_chip.ngpio = bcm63xx_gpio_count();
+ printk(KERN_INFO "registering %d GPIOs\n", bcm63xx_gpio_chip.ngpio);
return gpiochip_add(&bcm63xx_gpio_chip);
}
-arch_initcall(bcm63xx_gpio_init);