ramips: make rt2880_pci_base static
[openwrt.git] / target / linux / ramips / files / arch / mips / ralink / common / setup.c
index 81a1ba4..3030fcd 100644 (file)
@@ -12,6 +12,7 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/io.h>
+#include <linux/serial_8250.h>
 
 #include <asm/bootinfo.h>
 #include <asm/addrspace.h>
@@ -43,6 +44,30 @@ static void __init detect_mem_size(void)
        add_memory_region(RALINK_SOC_SDRAM_BASE, size, BOOT_MEM_RAM);
 }
 
+void __init ramips_early_serial_setup(int line, unsigned base, unsigned freq,
+                                     unsigned irq)
+{
+       struct uart_port p;
+       int err;
+
+       memset(&p, 0, sizeof(p));
+       p.flags         = UPF_SKIP_TEST;
+       p.iotype        = UPIO_AU;
+       p.uartclk       = freq;
+       p.regshift      = 2;
+       p.type          = PORT_16550A;
+
+       p.mapbase       = base;
+       p.membase       = ioremap_nocache(p.mapbase, PAGE_SIZE);
+       p.line          = line;
+       p.irq           = irq;
+
+       err = early_serial_setup(&p);
+       if (err)
+               printk(KERN_ERR "early serial%d registration failed %d\n",
+                      line, err);
+}
+
 void __init plat_mem_setup(void)
 {
        set_io_port_base(KSEG1);
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