ramips: initial board support for Aztech HW550-3G

[openwrt.git] / target / linux / generic / patches-2.6.35 / 030-pci_disable_common_quirks.patch

diff --git a/target/linux/generic/patches-2.6.35/030-pci_disable_common_quirks.patch b/target/linux/generic/patches-2.6.35/030-pci_disable_common_quirks.patch
index 0cf1978..5fc4949 100644 (file)
--- a/target/linux/generic/patches-2.6.35/030-pci_disable_common_quirks.patch
+++ b/target/linux/generic/patches-2.6.35/030-pci_disable_common_quirks.patch
@@ -23,7 +23,7 @@
  /* The Mellanox Tavor device gives false positive parity errors
   * Mark this device with a broken_parity_status, to allow
   * PCI scanning code to "skip" this now blacklisted device.
  /* The Mellanox Tavor device gives false positive parity errors
   * Mark this device with a broken_parity_status, to allow
   * PCI scanning code to "skip" this now blacklisted device.

-@@ -1901,7 +1902,9 @@ static void __devinit fixup_rev1_53c810(
+@@ -1924,7 +1925,9 @@ static void __devinit fixup_rev1_53c810(

        }
  }
  DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C810, fixup_rev1_53c810);
        }
  }
  DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C810, fixup_rev1_53c810);


@@ -33,11 +33,11 @@
  /* Enable 1k I/O space granularity on the Intel P64H2 */
  static void __devinit quirk_p64h2_1k_io(struct pci_dev *dev)
  {
  /* Enable 1k I/O space granularity on the Intel P64H2 */
  static void __devinit quirk_p64h2_1k_io(struct pci_dev *dev)
  {

-@@ -2551,6 +2554,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I
+@@ -2580,6 +2583,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I

  DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1518, quirk_i82576_sriov);
  
  #endif        /* CONFIG_PCI_IOV */
 +#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */
  
  DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1518, quirk_i82576_sriov);
  
  #endif        /* CONFIG_PCI_IOV */
 +#endif /* !CONFIG_PCI_DISABLE_COMMON_QUIRKS */
  

- /*
-  * This is a quirk for the Ricoh MMC controller found as a part of
+ /* Allow manual resource allocation for PCI hotplug bridges
+  * via pci=hpmemsize=nnM and pci=hpiosize=nnM parameters. For