#define ETH_FCS_LEN 4
#define AG71XX_DRV_NAME "ag71xx"
-#define AG71XX_DRV_VERSION "0.5.34"
+#define AG71XX_DRV_VERSION "0.5.35"
#define AG71XX_NAPI_WEIGHT 64
#define AG71XX_OOM_REFILL (1 + HZ/10)
#define AG71XX_INT_INIT (AG71XX_INT_ERR | AG71XX_INT_POLL)
#define AG71XX_TX_FIFO_LEN 2048
-#define AG71XX_TX_MTU_LEN 1536
+#define AG71XX_TX_MTU_LEN 1540
#define AG71XX_RX_PKT_RESERVE 64
#define AG71XX_RX_PKT_SIZE \
(AG71XX_RX_PKT_RESERVE + ETH_HLEN + ETH_FRAME_LEN + ETH_FCS_LEN)
struct mii_bus *mii_bus;
struct phy_device *phy_dev;
+ void *phy_priv;
unsigned int link;
unsigned int speed;
int rx, int tx) {}
#endif /* CONFIG_AG71XX_DEBUG_FS */
+void ag71xx_ar7240_start(struct ag71xx *ag);
+void ag71xx_ar7240_stop(struct ag71xx *ag);
+int ag71xx_ar7240_init(struct ag71xx *ag);
+void ag71xx_ar7240_cleanup(struct ag71xx *ag);
+
#endif /* _AG71XX_H */