* SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
*
- * $Id: pcibios.c,v 1.1.1.9 2006/02/27 03:42:55 honor Exp $
*/
#include <linux/config.h>
#include <typedefs.h>
#include <osl.h>
-#include <bcmutils.h>
#include <sbconfig.h>
#include <sbutils.h>
#include <hndpci.h>
{
ulong flags;
- if (!(sbh = sb_kattach()))
+ if (!(sbh = sb_kattach(SB_OSH)))
panic("sb_kattach failed");
spin_lock_init(&sbh_lock);
* after calling pcibios_enable_device().
*/
if (sb_coreid(sbh) == SB_USB) {
+ printk(KERN_INFO "SB USB 1.1 init\n");
sb_core_disable(sbh, sb_coreflags(sbh, 0, 0));
sb_core_reset(sbh, 1 << 29, 0);
}
* phy components out of reset.
*/
else if (sb_coreid(sbh) == SB_USB20H) {
+
+ uint corerev = sb_corerev(sbh);
+
+ printk(KERN_INFO "SB USB20H init\n");
+ printk(KERN_INFO "SB COREREV: %d\n", corerev);
+
if (!sb_iscoreup(sbh)) {
+
+ printk(KERN_INFO "SB USB20H resetting\n");
+
sb_core_reset(sbh, 0, 0);
writel(0x7FF, (ulong)regs + 0x200);
udelay(1);
}
+ /* PRxxxx: War for 5354 failures. */
+ if (corerev == 1 || corerev == 2) {
+ uint32 tmp;
+
+ /* Change Flush control reg */
+ tmp = readl((uintptr)regs + 0x400);
+ tmp &= ~8;
+ writel(tmp, (uintptr)regs + 0x400);
+ tmp = readl((uintptr)regs + 0x400);
+ printk(KERN_INFO "USB20H fcr: 0x%x\n", tmp);
+
+ /* Change Shim control reg */
+ tmp = readl((uintptr)regs + 0x304);
+ tmp &= ~0x100;
+ writel(tmp, (uintptr)regs + 0x304);
+ tmp = readl((uintptr)regs + 0x304);
+ printk(KERN_INFO "USB20H shim cr: 0x%x\n", tmp);
+ }
+
} else
sb_core_reset(sbh, 0, 0);