ar71xx: add preliminary support for wzr-hp-g450h
[openwrt.git] / target / linux / brcm63xx / patches-3.0 / 452-board_V2500V.patch
index 210008a..f28a10d 100644 (file)
@@ -64,7 +64,7 @@
  #endif
  
  /*
-@@ -1909,6 +1966,7 @@ static const struct board_info __initdat
+@@ -1911,6 +1968,7 @@ static const struct board_info __initdat
        &board_96348_D4PW,
        &board_spw500v,
        &board_96348sv,
@@ -72,9 +72,9 @@
  #endif
  
  #ifdef CONFIG_BCM63XX_CPU_6358
-@@ -2068,6 +2126,22 @@ void __init board_prom_init(void)
-               val &= MPI_CSBASE_BASE_MASK;
-       }
+@@ -2064,6 +2122,22 @@ void __init board_prom_init(void)
+       val = bcm_mpi_readl(MPI_CSBASE_REG(0));
+       val &= MPI_CSBASE_BASE_MASK;
        boot_addr = (u8 *)KSEG1ADDR(val);
 +      printk(KERN_INFO PFX "Boot address 0x%08x\n",(unsigned int)boot_addr);
 +
  
        /* dump cfe version */
        cfe = boot_addr + BCM963XX_CFE_VERSION_OFFSET;
-@@ -2276,6 +2350,14 @@ int __init board_register_devices(void)
-               val = bcm_mpi_readl(MPI_CSBASE_REG(0));
-               val &= MPI_CSBASE_BASE_MASK;
-       }
-+
+@@ -2265,6 +2339,13 @@ int __init board_register_devices(void)
+       val = bcm_mpi_readl(MPI_CSBASE_REG(0));
+       val &= MPI_CSBASE_BASE_MASK;
 +      /* BT Voyager 2500V has 8 Meg flash in two 4 Meg banks */
 +      /* Loading from CFE always uses Bank 0 */
 +      if (!strcmp(board.name, "V2500V_BB")) {
 +              printk(KERN_INFO PFX "V2500V: Start in Bank 0\n");
 +              val = val + 0x400000; // Select Bank 0 start address
-+              }
++      }
 +
        mtd_resources[0].start = val;
        mtd_resources[0].end = 0x1FFFFFFF;
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