+
+static struct ar8327_pad_cfg rb750gr3_ar8327_pad0_cfg = {
+ .mode = AR8327_PAD_MAC_RGMII,
+ .txclk_delay_en = true,
+ .rxclk_delay_en = true,
+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
+};
+
+static struct ar8327_platform_data rb750gr3_ar8327_data = {
+ .pad0_cfg = &rb750gr3_ar8327_pad0_cfg,
+ .cpuport_cfg = {
+ .force_link = 1,
+ .speed = AR8327_PORT_SPEED_100,
+ .duplex = 1,
+ .txpause = 1,
+ .rxpause = 1,
+ }
+};
+
+static struct mdio_board_info rb750g3_mdio_info[] = {
+ {
+ .bus_id = "ag71xx-mdio.0",
+ .phy_addr = 0,
+ .platform_data = &rb750gr3_ar8327_data,
+ },
+};
+
+static void rb750gr3_nand_enable_pins(void)
+{
+ ath79_gpio_function_setup(AR724X_GPIO_FUNC_JTAG_DISABLE,
+ AR724X_GPIO_FUNC_SPI_EN |
+ AR724X_GPIO_FUNC_SPI_CS_EN2);
+}
+
+static void rb750gr3_nand_disable_pins(void)
+{
+ ath79_gpio_function_setup(AR724X_GPIO_FUNC_SPI_EN |
+ AR724X_GPIO_FUNC_SPI_CS_EN2,
+ AR724X_GPIO_FUNC_JTAG_DISABLE);
+}
+
+static void rb750gr3_latch_change(u32 mask_clr, u32 mask_set)
+{
+ static DEFINE_SPINLOCK(lock);
+ static u32 latch_set = RB7XX_LED_ACT;
+ static u32 latch_clr;
+ void __iomem *base = ath79_gpio_base;
+ unsigned long flags;
+ u32 t;
+
+ spin_lock_irqsave(&lock, flags);
+
+ latch_set = (latch_set | mask_set) & ~mask_clr;
+ latch_clr = (latch_clr | mask_clr) & ~mask_set;
+
+ mask_set = latch_set & (RB7XX_USB_POWERON | RB7XX_MONITOR);
+ mask_clr = latch_clr & (RB7XX_USB_POWERON | RB7XX_MONITOR);
+
+ if ((latch_set ^ RB7XX_LED_ACT) & RB7XX_LED_ACT) {
+ /* enable output mode */
+ t = __raw_readl(base + AR71XX_GPIO_REG_OE);
+ t |= RB7XX_LED_ACT;
+ __raw_writel(t, base + AR71XX_GPIO_REG_OE);
+
+ mask_clr |= RB7XX_LED_ACT;
+ } else {
+ /* disable output mode */
+ t = __raw_readl(base + AR71XX_GPIO_REG_OE);
+ t &= ~RB7XX_LED_ACT;
+ __raw_writel(t, base + AR71XX_GPIO_REG_OE);
+ }
+
+ __raw_writel(mask_set, base + AR71XX_GPIO_REG_SET);
+ __raw_writel(mask_clr, base + AR71XX_GPIO_REG_CLEAR);
+
+ spin_unlock_irqrestore(&lock, flags);
+}
+
+static void __init rb750gr3_setup(void)
+{
+ ath79_register_mdio(0, 0x0);
+ mdiobus_register_board_info(rb750g3_mdio_info,
+ ARRAY_SIZE(rb750g3_mdio_info));
+
+ ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
+ ath79_eth0_data.phy_mask = BIT(0);
+
+ ath79_register_eth(0);
+
+ rb750_leds_data.num_leds = ARRAY_SIZE(rb750gr3_leds);
+ rb750_leds_data.leds = rb750gr3_leds;
+ rb750_leds_data.latch_change = rb750gr3_latch_change;
+ platform_device_register(&rb750_leds_device);
+
+ rb750_nand_data.nce_line = RB7XX_NAND_NCE;
+ rb750_nand_data.enable_pins = rb750gr3_nand_enable_pins;
+ rb750_nand_data.disable_pins = rb750gr3_nand_disable_pins;
+ rb750_nand_data.latch_change = rb750gr3_latch_change;
+ platform_device_register(&rb750_nand_device);
+}
+
+MIPS_MACHINE(ATH79_MACH_RB_750G_R3, "750Gr3", "MikroTik RouterBOARD 750GL",
+ rb750gr3_setup);