[octeon] resync kernel configuration

[openwrt.git] / tools / firmware-utils / src / myloader.h

diff --git a/tools/firmware-utils/src/myloader.h b/tools/firmware-utils/src/myloader.h
index 2c8b50e..d7e1d80 100644 (file)
--- a/tools/firmware-utils/src/myloader.h
+++ b/tools/firmware-utils/src/myloader.h
@@ -1,5 +1,5 @@
 /*
- *  Copyright (C) 2006,2007 Gabor Juhos
+ *  Copyright (C) 2006-2008 Gabor Juhos <juhosg@openwrt.org>
  *
  *  This program is free software; you can redistribute  it and/or modify it
  *  under  the terms of  the GNU General  Public License as published by the
@@ -26,12 +26,22 @@
  *
  */
 
+/* Myloader specific magic numbers */
 #define MYLO_MAGIC_FIRMWARE    0x4C594D00
 #define MYLO_MAGIC_20021103    0x20021103
 #define MYLO_MAGIC_20021107    0x20021107
 
-#define MYLO_MAGIC_SYSSETUP    MYLO_MAGIC_20021107
+#define MYLO_MAGIC_SYS_PARAMS  MYLO_MAGIC_20021107
 #define MYLO_MAGIC_PARTITIONS  MYLO_MAGIC_20021103
+#define MYLO_MAGIC_BOARD_PARAMS        MYLO_MAGIC_20021103
+
+/*
+ * Addresses of the data structures provided by MyLoader
+ */
+#define MYLO_MIPS_SYS_PARAMS   0x80000800      /* System Parameters */
+#define MYLO_MIPS_BOARD_PARAMS 0x80000A00      /* Board Parameters */
+#define MYLO_MIPS_PARTITIONS   0x80000C00      /* Partition Table */
+#define MYLO_MIPS_BOOT_PARAMS  0x80000E00      /* Boot Parameters */
 
 /* Vendor ID's (seems to be same as the PCI vendor ID's) */
 #define VENID_COMPEX           0x11F6
@@ -46,6 +56,13 @@
 #define DEVID_COMPEX_WPP54AG   0x0550
 #define DEVID_COMPEX_WPP54G    0x0555
 
+/* Devices based on the Atheros AR2317 */
+#define DEVID_COMPEX_NP25G     0x05e6
+#define DEVID_COMPEX_WPE53G    0x05dc
+
+/* Devices based on the Atheros AR71xx */
+#define DEVID_COMPEX_WP543     0x0640
+
 /* Devices based on the IXP422 */
 #define DEVID_COMPEX_WP18      0x047E
 #define DEVID_COMPEX_NP18A     0x0489
@@ -55,7 +72,7 @@
 #define DEVID_COMPEX_NP26G16M  0x03E9
 
 struct mylo_fw_header {
-       uint32_t        magic;  /* must be MYLO_MAGIC_MYLO */
+       uint32_t        magic;  /* must be MYLO_MAGIC_FIRMWARE */
        uint32_t        crc;    /* CRC of the whole firmware */
        uint32_t        res0;   /* unknown/unused */
        uint32_t        res1;   /* unknown/unused */
@@ -98,6 +115,7 @@ struct mylo_partition {
 #define PARTIIION_FLAG_RAMLOAD 0x1000 /* FIXME: load this partition into the RAM? */
 #define PARTITION_FLAG_PRELOAD 0x0800 /* the partition data preloaded to RAM
                                        * before decompression */
+#define PARTITION_FLAG_LZMA    0x0100 /* the partition data compressed with LZMA */
 #define PARTITION_FLAG_HAVEHDR  0x0002 /* the partition data have a header */
 
 #define PARTITION_TYPE_FREE    0
@@ -107,7 +125,7 @@ struct mylo_partition {
                                           partition table */
 
 struct mylo_partition_table {
-       uint32_t        magic;  /* must be 0x20021103 */
+       uint32_t        magic;  /* must be MYLO_MAGIC_PARTITIONS */
        uint32_t        res0;   /* unknown/unused */
        uint32_t        res1;   /* unknown/unused */
        uint32_t        res2;   /* unknown/unused */
@@ -120,7 +138,7 @@ struct mylo_partition_header {
 };
 
 struct mylo_system_params {
-       uint32_t        magic;
+       uint32_t        magic;  /* must be MYLO_MAGIC_SYS_PARAMS */
        uint32_t        res0;
        uint32_t        res1;
        uint32_t        mylo_ver;
@@ -133,8 +151,8 @@ struct mylo_system_params {
        uint32_t        fwlo;
        uint32_t        tftp_addr;
        uint32_t        prog_start;
-       uint32_t        flash_size;
-       uint32_t        dram_size;
+       uint32_t        flash_size;     /* Size of boot FLASH in bytes */
+       uint32_t        dram_size;      /* Size of onboard RAM in bytes */
 };
 
 
@@ -147,7 +165,7 @@ struct mylo_eth_addr {
                                           in the board parameters */
 
 struct mylo_board_params {
-       uint32_t        magic;
+       uint32_t        magic;  /* must be MYLO_MAGIC_BOARD_PARAMS */
        uint32_t        res0;
        uint32_t        res1;
        uint32_t        res2;