+#define BCM_6338_ENET1_BASE (0xdeadbeef)
+#define BCM_6338_ENETDMA_BASE (0xfffe3800)
+#define BCM_6338_EHCI0_BASE (0xdeadbeef)
+#define BCM_6338_SDRAM_BASE (0xfffe3100)
+#define BCM_6338_MEMC_BASE (0xdeadbeef)
+#define BCM_6338_DDR_BASE (0xdeadbeef)
+
+/*
+ * 6345 register sets base address
+ */
+#define BCM_6345_PERF_BASE (0xfffe0000)
+#define BCM_6345_TIMER_BASE (0xfffe0200)
+#define BCM_6345_WDT_BASE (0xfffe021c)
+#define BCM_6345_UART0_BASE (0xfffe0300)
+#define BCM_6345_GPIO_BASE (0xfffe0400)