+#define PCI_CS_PR_BASE_ADDR (KSEG1 + 0x17000000)
+
+/*------------ WDT */
-+#define LQ_WDT_BASE 0x1F880000
-+#define LQ_WDT_SIZE 0x400
++#define LQ_WDT_BASE 0x1F8803F0
++#define LQ_WDT_SIZE 0x10
+
+/*------------ Serial To Parallel conversion */
+#define LQ_STP_BASE 0x1E100BB0