ar71xx: set a reserved bit that resets to 1 when writing the address table control...

[openwrt.git] / toolchain / uClibc / patches-0.9.32 / 601-ubicom32_uClibc_fixes.patch

diff --git a/toolchain/uClibc/patches-0.9.32/601-ubicom32_uClibc_fixes.patch b/toolchain/uClibc/patches-0.9.32/601-ubicom32_uClibc_fixes.patch
index b4f9ce6..c618e26 100644 (file)
--- a/toolchain/uClibc/patches-0.9.32/601-ubicom32_uClibc_fixes.patch
+++ b/toolchain/uClibc/patches-0.9.32/601-ubicom32_uClibc_fixes.patch
@@ -14,7 +14,7 @@
 @@ -166,7 +170,7 @@ unsigned int __dl_parse_dynamic_info(Elf
           we'd have to walk all the loadsegs to find out if it was
           actually unnecessary, so skip this optimization.  */
- #ifndef __FDPIC__
+ #if !defined __FDPIC__ && !defined __DSBT__
 -      if (load_off != 0)
 +      if (DL_LOADADDR_ISSET(load_off))
  #endif